kernel_samsung_a34x-permissive/arch/arm/boot/dts/armada-370-dlink-dns327l.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for D-Link DNS-327L
 *
 * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
 */

/* Remaining unsolved:
 * There's still some unknown device on i2c address 0x13
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-370.dtsi"

/ {
	model = "D-Link DNS-327L";
	compatible = "dlink,dns327l",
		"marvell,armada370",
		"marvell,armada-370-xp";

	chosen {
		stdout-path = &uart0;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x20000000>; /* 512 MiB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		internal-regs {
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			usb@50000 {
				status = "okay";
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <
			&backup_button_pin
			&power_button_pin
			&reset_button_pin>;
		pinctrl-names = "default";

		power-button {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
		};

		backup-button {
			label = "Backup Button";
			linux,code = <KEY_COPY>;
			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
		};

		reset-button {
			label = "Reset Button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <
			&sata_l_amber_pin
			&sata_r_amber_pin
			&backup_led_pin
			/* Ensure these are managed by hardware */
			&sata_l_white_pin
			&sata_r_white_pin>;

		pinctrl-names = "default";

		sata-r-amber-pin {
			label = "dns327l:amber:sata-r";
			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		sata-l-amber-pin {
			label = "dns327l:amber:sata-l";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		backup-led-pin {
			label = "dns327l:white:usb";
			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		usb_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			pinctrl-0 = <&xhci_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "USB3.0 Port Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-boot-on;
			regulator-always-on;
			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
		};

		sata_r_power: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			pinctrl-0 = <&sata_r_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "SATA-R Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <2000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
		};

		sata_l_power: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			pinctrl-0 = <&sata_l_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "SATA-L Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <4000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pciec {
	status = "okay";

	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&pinctrl {
	sata_l_white_pin: sata-l-white-pin {
		marvell,pins = "mpp57";
		marvell,function = "sata0";
	};

	sata_r_white_pin: sata-r-white-pin {
		marvell,pins = "mpp55";
		marvell,function = "sata1";
	};

	sata_r_amber_pin: sata-r-amber-pin {
		marvell,pins = "mpp52";
		marvell,function = "gpio";
	};

	sata_l_amber_pin: sata-l-amber-pin {
		marvell,pins = "mpp53";
		marvell,function = "gpio";
	};

	backup_led_pin: backup-led-pin {
		marvell,pins = "mpp61";
		marvell,function = "gpo";
	};

	xhci_pwr_pin: xhci-pwr-pin {
		marvell,pins = "mpp13";
		marvell,function = "gpio";
	};

	sata_r_pwr_pin: sata-r-pwr-pin {
		marvell,pins = "mpp54";
		marvell,function = "gpio";
	};

	sata_l_pwr_pin: sata-l-pwr-pin {
		marvell,pins = "mpp56";
		marvell,function = "gpio";
	};

	uart1_pins: uart1-pins {
		marvell,pins = "mpp60", "mpp61";
		marvell,function = "uart1";
	};

	power_button_pin: power-button-pin {
		marvell,pins = "mpp65";
		marvell,function = "gpio";
	};

	backup_button_pin: backup-button-pin {
		marvell,pins = "mpp63";
		marvell,function = "gpio";
	};

	reset_button_pin: reset-button-pin {
		marvell,pins = "mpp64";
		marvell,function = "gpio";
	};
};

/* Serial console */
&uart0 {
	status = "okay";
};

/* Connected to Weltrend MCU */
&uart1 {
	pinctrl-0 = <&uart1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&mdio {
	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
		reg = <0>;
		marvell,reg-init = <0x0 0x16 0x0 0x0002>,
				<0x0 0x19 0x0 0x0077>,
				<0x0 0x18 0x0 0x5747>;
	};
};

&eth1 {
	phy = <&phy0>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&i2c0 {
	compatible = "marvell,mv64xxx-i2c";
	clock-frequency = <100000>;
	status = "okay";
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		nand-rb = <0>;
		marvell,nand-keep-config;
		nand-on-flash-bbt;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				/* 1.0 MiB */
				reg = <0x0000000 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				/* 128 KiB */
				reg = <0x100000 0x20000>;
				read-only;
			};

			partition@120000 {
				label = "uImage";
				/* 7 MiB */
				reg = <0x120000 0x700000>;
			};

			partition@820000 {
				label = "ubifs";
				/* ~ 84 MiB */
				reg = <0x820000 0x54e0000>;
			};

			/* Hardcoded into stock bootloader */
			partition@5d00000 {
				label = "failsafe-uImage";
				/* 5 MiB */
				reg = <0x5d00000 0x500000>;
			};

			partition@6200000 {
				label = "failsafe-fs";
				/* 29 MiB */
				reg = <0x6200000 0x1d00000>;
			};

			partition@7f00000 {
				label = "bbt";
				/* 1 MiB for BBT */
				reg = <0x7f00000 0x100000>;
			};
		};
	};
};