733 lines
16 KiB
Plaintext
733 lines
16 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Copyright 2016 Boundary Devices, Inc.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = &uart2;
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};
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memory@10000000 {
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reg = <0x10000000 0x40000000>;
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};
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backlight_lcd: backlight-lcd {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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backlight_lvds0: backlight-lvds0 {
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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backlight_lvds1: backlight-lvds1 {
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compatible = "gpio-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight_lvds1>;
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gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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default-on;
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status = "okay";
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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wakeup-source;
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};
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menu {
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label = "Menu";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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};
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home {
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label = "Home";
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gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOME>;
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};
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back {
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label = "Back";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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lcd_display: disp0 {
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compatible = "fsl,imx-parallel-display";
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#address-cells = <1>;
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#size-cells = <0>;
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interface-pix-fmt = "bgr666";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_j15>;
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status = "okay";
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port@0 {
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reg = <0>;
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lcd_display_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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lcd_display_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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panel-lcd {
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compatible = "okaya,rs800480t-7x0gp";
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backlight = <&backlight_lcd>;
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcd_display_out>;
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};
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};
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};
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panel-lvds0 {
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compatible = "hannstar,hsd100pxn1";
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backlight = <&backlight_lvds0>;
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port {
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panel_in_lvds0: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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panel-lvds1 {
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compatible = "hannstar,hsd100pxn1";
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backlight = <&backlight_lvds1>;
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port {
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panel_in_lvds1: endpoint {
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remote-endpoint = <&lvds1_out>;
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};
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};
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};
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reg_1p8v: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_2p5v: regulator-2v5 {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_can_xcvr: regulator-can-xcvr {
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compatible = "regulator-fixed";
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regulator-name = "CAN XCVR";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can_xcvr>;
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gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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reg_usb_h1_vbus: regulator-usb-h1-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh1>;
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_wlan_vmmc: regulator-wlan-vmmc {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wlan_vmmc>;
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regulator-name = "reg_wlan_vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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sound {
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compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6q-nitrogen6_som2-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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xceiver-supply = <®_can_xcvr>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ecspi1 {
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cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash: m25p80@0 {
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compatible = "microchip,sst25vf016b";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
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<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
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fsl,err006687-workaround-present;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@a {
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compatible = "fsl,sgtl5000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sgtl5000>;
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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rtc@68 {
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compatible = "microcrystal,rv4162";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rv4162>;
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reg = <0x68>;
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interrupts-extended = <&gpio6 7 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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touchscreen@4 {
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compatible = "eeti,egalax_ts";
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reg = <0x04>;
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interrupt-parent = <&gpio1>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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};
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touchscreen@38 {
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compatible = "edt,edt-ft5x06";
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reg = <0x38>;
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interrupt-parent = <&gpio1>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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wakeup-source;
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};
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};
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&iomuxc {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_backlight_lvds1: backlight-lvds1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x0b0b0
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>;
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};
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_can_xcvr: can-xcvrgrp {
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fsl,pins = <
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/* Flexcan XCVR enable */
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
|
||
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
|
||
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
|
||
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
|
||
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
|
||
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
|
||
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
||
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
|
||
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
||
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x130b0
|
||
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
||
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
|
||
|
|
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x030b0
|
||
|
|
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
||
|
|
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_gpio_keys: gpio-keysgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* Power Button */
|
||
|
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
|
||
|
|
/* Menu Button */
|
||
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
||
|
|
/* Home Button */
|
||
|
|
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
|
||
|
|
/* Back Button */
|
||
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
||
|
|
/* Volume Up Button */
|
||
|
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
||
|
|
/* Volume Down Button */
|
||
|
|
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c1: i2c1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c2: i2c2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c3: i2c3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
|
||
|
|
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c3mux: i2c3muxgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* PCIe I2C enable */
|
||
|
|
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x000b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_j15: j15grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
|
||
|
|
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
|
||
|
|
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
|
||
|
|
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
|
||
|
|
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pcie: pciegrp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* PCIe reset */
|
||
|
|
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0
|
||
|
|
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm1: pwm1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x030b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm3: pwm3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x030b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm4: pwm4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x030b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_rv4162: rv4162grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_sgtl5000: sgtl5000grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
|
||
|
|
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0
|
||
|
|
MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x130b0
|
||
|
|
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x130b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart1: uart1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart2: uart2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart3: uart3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbh1: usbh1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbotg: usbotggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||
|
|
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
||
|
|
/* power enable, high active */
|
||
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
|
||
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
|
||
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
|
||
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
|
||
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
|
||
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17071
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17071
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17071
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17071
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17071
|
||
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc4: usdhc4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_wlan_vmmc: wlan-vmmcgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x100b0
|
||
|
|
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x030b0
|
||
|
|
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x030b0
|
||
|
|
MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&ipu1_di0_disp0 {
|
||
|
|
remote-endpoint = <&lcd_display_in>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&ldb {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
lvds-channel@0 {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
|
||
|
|
lvds0_out: endpoint {
|
||
|
|
remote-endpoint = <&panel_in_lvds0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
lvds-channel@1 {
|
||
|
|
fsl,data-mapping = "spwg";
|
||
|
|
fsl,data-width = <18>;
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
|
||
|
|
lvds1_out: endpoint {
|
||
|
|
remote-endpoint = <&panel_in_lvds1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&pcie {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
||
|
|
reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm1 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm3>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm4>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&ssi1 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart1 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart2 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
||
|
|
uart-has-rtscts;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbh1 {
|
||
|
|
vbus-supply = <®_usb_h1_vbus>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbotg {
|
||
|
|
vbus-supply = <®_usb_otg_vbus>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
||
|
|
disable-over-current;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usdhc2 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
||
|
|
bus-width = <4>;
|
||
|
|
non-removable;
|
||
|
|
vmmc-supply = <®_wlan_vmmc>;
|
||
|
|
cap-power-off-card;
|
||
|
|
keep-power-in-suspend;
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
wlcore: wlcore@2 {
|
||
|
|
compatible = "ti,wl1271";
|
||
|
|
reg = <2>;
|
||
|
|
interrupt-parent = <&gpio6>;
|
||
|
|
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
ref-clock-frequency = <38400000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&usdhc3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
||
|
|
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||
|
|
bus-width = <4>;
|
||
|
|
vmmc-supply = <®_3p3v>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usdhc4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
||
|
|
bus-width = <8>;
|
||
|
|
non-removable;
|
||
|
|
vmmc-supply = <®_1p8v>;
|
||
|
|
keep-power-in-suspend;
|
||
|
|
status = "okay";
|
||
|
|
};
|