40 lines
1,005 B
C
40 lines
1,005 B
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arch/arm/include/asm/byteorder.h
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*
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* ARM Endian-ness. In little endian mode, the data bus is connected such
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* that byte accesses appear as:
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* 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*
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* When in big endian mode, byte accesses appear as:
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* 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*/
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#ifndef __ASM_ARM_SWAB_H
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#define __ASM_ARM_SWAB_H
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#include <uapi/asm/swab.h>
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#if __LINUX_ARM_ARCH__ >= 6
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static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
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{
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__asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
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return x;
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}
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#define __arch_swahb32 __arch_swahb32
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#define __arch_swab16(x) ((__u16)__arch_swahb32(x))
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static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
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{
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__asm__ ("rev %0, %1" : "=r" (x) : "r" (x));
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return x;
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}
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#define __arch_swab32 __arch_swab32
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#endif
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#endif
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