323 lines
7.2 KiB
Plaintext
323 lines
7.2 KiB
Plaintext
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/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-msm8994.h>
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/ {
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model = "Qualcomm Technologies, Inc. MSM 8992";
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compatible = "qcom,msm8992";
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// msm-id needed by bootloader for selecting correct blob
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qcom,msm-id = <251 0>, <252 0>;
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interrupt-parent = <&intc>;
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#address-cells = <2>;
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#size-cells = <2>;
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chosen { };
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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};
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};
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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reg = <0x0 0x0>;
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next-level-cache = <&L2_0>;
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L2_0: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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};
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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xo_board: xo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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vreg_vph_pwr: vreg-vph-pwr {
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compatible = "regulator-fixed";
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status = "okay";
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regulator-name = "vph-pwr";
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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regulator-always-on;
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};
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sfpb_mutex: hwmutex {
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compatible = "qcom,sfpb-mutex";
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syscon = <&sfpb_mutex_regs 0x0 0x100>;
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#hwlock-cells = <1>;
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_region>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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hwlocks = <&sfpb_mutex 3>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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intc: interrupt-controller@f9000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0xf9000000 0x1000>,
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<0xf9002000 0x1000>;
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};
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apcs: syscon@f900d000 {
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compatible = "syscon";
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reg = <0xf900d000 0x2000>;
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};
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timer@f9020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0xf9020000 0x1000>;
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frame@f9021000 {
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frame-number = <0>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9021000 0x1000>,
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<0xf9022000 0x1000>;
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};
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frame@f9023000 {
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frame-number = <1>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9023000 0x1000>;
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status = "disabled";
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};
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frame@f9024000 {
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frame-number = <2>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9024000 0x1000>;
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status = "disabled";
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};
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frame@f9025000 {
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frame-number = <3>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9025000 0x1000>;
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status = "disabled";
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};
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frame@f9026000 {
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frame-number = <4>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9026000 0x1000>;
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status = "disabled";
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};
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frame@f9027000 {
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frame-number = <5>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9027000 0x1000>;
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status = "disabled";
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};
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frame@f9028000 {
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frame-number = <6>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9028000 0x1000>;
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status = "disabled";
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};
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};
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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msmgpio: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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blsp1_uart2: serial@f991e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf991e000 0x1000>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>;
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status = "disabled";
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clock-names = "core", "iface";
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clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
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<&clock_gcc GCC_BLSP1_AHB_CLK>;
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};
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clock_gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8994";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0xfc400000 0x2000>;
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};
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sdhci1: mmc@f9824900 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
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<GIC_SPI 138 IRQ_TYPE_NONE>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
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<&clock_gcc GCC_SDCC1_AHB_CLK>;
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clock-names = "core", "iface";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
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&sdc1_rclk_on>;
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pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
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&sdc1_rclk_off>;
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regulator-always-on;
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bus-width = <8>;
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mmc-hs400-1_8v;
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status = "okay";
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};
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rpm_msg_ram: memory@fc428000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0xfc428000 0x4000>;
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};
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sfpb_mutex_regs: syscon@fd484000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "syscon";
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reg = <0xfd484000 0x400>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 0 0>; // bootloader will update
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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smem_region: smem@6a00000 {
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reg = <0x0 0x6a00000 0x0 0x200000>;
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no-map;
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};
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};
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smd_rpm: smd {
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compatible = "qcom,smd";
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rpm {
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 8 0>;
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qcom,smd-edge = <15>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <6>;
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rpm-requests {
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compatible = "qcom,rpm-msm8994";
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qcom,smd-channels = "rpm_requests";
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pm8994-regulators {
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compatible = "qcom,rpm-pm8994-regulators";
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pm8994_s1: s1 {};
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pm8994_s2: s2 {};
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pm8994_s3: s3 {};
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pm8994_s4: s4 {};
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pm8994_s5: s5 {};
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pm8994_s6: s6 {};
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pm8994_s7: s7 {};
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pm8994_l1: l1 {};
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pm8994_l2: l2 {};
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pm8994_l3: l3 {};
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pm8994_l4: l4 {};
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pm8994_l6: l6 {};
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pm8994_l8: l8 {};
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pm8994_l9: l9 {};
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pm8994_l10: l10 {};
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pm8994_l11: l11 {};
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pm8994_l12: l12 {};
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pm8994_l13: l13 {};
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pm8994_l14: l14 {};
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pm8994_l15: l15 {};
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pm8994_l16: l16 {};
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pm8994_l17: l17 {};
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pm8994_l18: l18 {};
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pm8994_l19: l19 {};
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pm8994_l20: l20 {};
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pm8994_l21: l21 {};
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pm8994_l22: l22 {};
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pm8994_l23: l23 {};
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pm8994_l24: l24 {};
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pm8994_l25: l25 {};
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pm8994_l26: l26 {};
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pm8994_l27: l27 {};
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pm8994_l28: l28 {};
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pm8994_l29: l29 {};
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pm8994_l30: l30 {};
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pm8994_l31: l31 {};
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pm8994_l32: l32 {};
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pm8994_lvs1: lvs1 {};
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pm8994_lvs2: lvs2 {};
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};
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};
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};
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};
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};
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#include "msm8992-pins.dtsi"
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