748 lines
17 KiB
ArmAsm
748 lines
17 KiB
ArmAsm
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| util.sa 3.7 7/29/91
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| This file contains routines used by other programs.
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| ovf_res: used by overflow to force the correct
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| result. ovf_r_k, ovf_r_x2, ovf_r_x3 are
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| derivatives of this routine.
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| get_fline: get user's opcode word
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| g_dfmtou: returns the destination format.
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| g_opcls: returns the opclass of the float instruction.
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| g_rndpr: returns the rounding precision.
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| reg_dest: write byte, word, or long data to Dn
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| Copyright (C) Motorola, Inc. 1990
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| All Rights Reserved
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| For details on the license for this file, please see the
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| file, README, in this same directory.
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|UTIL idnt 2,1 | Motorola 040 Floating Point Software Package
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|section 8
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#include "fpsp.h"
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|xref mem_read
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.global g_dfmtou
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.global g_opcls
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.global g_rndpr
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.global get_fline
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.global reg_dest
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| Final result table for ovf_res. Note that the negative counterparts
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| are unnecessary as ovf_res always returns the sign separately from
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| the exponent.
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| ;+inf
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EXT_PINF: .long 0x7fff0000,0x00000000,0x00000000,0x00000000
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| ;largest +ext
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EXT_PLRG: .long 0x7ffe0000,0xffffffff,0xffffffff,0x00000000
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| ;largest magnitude +sgl in ext
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SGL_PLRG: .long 0x407e0000,0xffffff00,0x00000000,0x00000000
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| ;largest magnitude +dbl in ext
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DBL_PLRG: .long 0x43fe0000,0xffffffff,0xfffff800,0x00000000
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| ;largest -ext
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tblovfl:
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.long EXT_RN
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.long EXT_RZ
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.long EXT_RM
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.long EXT_RP
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.long SGL_RN
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.long SGL_RZ
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.long SGL_RM
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.long SGL_RP
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.long DBL_RN
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.long DBL_RZ
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.long DBL_RM
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.long DBL_RP
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.long error
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.long error
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.long error
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.long error
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| ovf_r_k --- overflow result calculation
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| This entry point is used by kernel_ex.
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| This forces the destination precision to be extended
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| Input: operand in ETEMP
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| Output: a result is in ETEMP (internal extended format)
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.global ovf_r_k
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ovf_r_k:
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lea ETEMP(%a6),%a0 |a0 points to source operand
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bclrb #sign_bit,ETEMP_EX(%a6)
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sne ETEMP_SGN(%a6) |convert to internal IEEE format
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| ovf_r_x2 --- overflow result calculation
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| This entry point used by x_ovfl. (opclass 0 and 2)
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| Input a0 points to an operand in the internal extended format
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| Output a0 points to the result in the internal extended format
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| This sets the round precision according to the user's FPCR unless the
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| instruction is fsgldiv or fsglmul or fsadd, fdadd, fsub, fdsub, fsmul,
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| fdmul, fsdiv, fddiv, fssqrt, fsmove, fdmove, fsabs, fdabs, fsneg, fdneg.
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| If the instruction is fsgldiv of fsglmul, the rounding precision must be
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| extended. If the instruction is not fsgldiv or fsglmul but a force-
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| precision instruction, the rounding precision is then set to the force
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| precision.
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.global ovf_r_x2
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ovf_r_x2:
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btstb #E3,E_BYTE(%a6) |check for nu exception
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beql ovf_e1_exc |it is cu exception
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ovf_e3_exc:
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movew CMDREG3B(%a6),%d0 |get the command word
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andiw #0x00000060,%d0 |clear all bits except 6 and 5
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cmpil #0x00000040,%d0
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beql ovff_sgl |force precision is single
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cmpil #0x00000060,%d0
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beql ovff_dbl |force precision is double
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movew CMDREG3B(%a6),%d0 |get the command word again
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andil #0x7f,%d0 |clear all except operation
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cmpil #0x33,%d0
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beql ovf_fsgl |fsglmul or fsgldiv
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cmpil #0x30,%d0
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beql ovf_fsgl
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bra ovf_fpcr |instruction is none of the above
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| ;use FPCR
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ovf_e1_exc:
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movew CMDREG1B(%a6),%d0 |get command word
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andil #0x00000044,%d0 |clear all bits except 6 and 2
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cmpil #0x00000040,%d0
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beql ovff_sgl |the instruction is force single
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cmpil #0x00000044,%d0
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beql ovff_dbl |the instruction is force double
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movew CMDREG1B(%a6),%d0 |again get the command word
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andil #0x0000007f,%d0 |clear all except the op code
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cmpil #0x00000027,%d0
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beql ovf_fsgl |fsglmul
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cmpil #0x00000024,%d0
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beql ovf_fsgl |fsgldiv
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bra ovf_fpcr |none of the above, use FPCR
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| Inst is either fsgldiv or fsglmul. Force extended precision.
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ovf_fsgl:
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clrl %d0
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bra ovf_res
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ovff_sgl:
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movel #0x00000001,%d0 |set single
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bra ovf_res
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ovff_dbl:
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movel #0x00000002,%d0 |set double
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bra ovf_res
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| The precision is in the fpcr.
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ovf_fpcr:
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bfextu FPCR_MODE(%a6){#0:#2},%d0 |set round precision
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bra ovf_res
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| ovf_r_x3 --- overflow result calculation
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| This entry point used by x_ovfl. (opclass 3 only)
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| Input a0 points to an operand in the internal extended format
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| Output a0 points to the result in the internal extended format
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| This sets the round precision according to the destination size.
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.global ovf_r_x3
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ovf_r_x3:
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bsr g_dfmtou |get dest fmt in d0{1:0}
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| ;for fmovout, the destination format
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| ;is the rounding precision
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| ovf_res --- overflow result calculation
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| Input:
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| a0 points to operand in internal extended format
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| Output:
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| a0 points to result in internal extended format
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.global ovf_res
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ovf_res:
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lsll #2,%d0 |move round precision to d0{3:2}
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bfextu FPCR_MODE(%a6){#2:#2},%d1 |set round mode
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orl %d1,%d0 |index is fmt:mode in d0{3:0}
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leal tblovfl,%a1 |load a1 with table address
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movel %a1@(%d0:l:4),%a1 |use d0 as index to the table
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jmp (%a1) |go to the correct routine
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|case DEST_FMT = EXT
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EXT_RN:
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leal EXT_PINF,%a1 |answer is +/- infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bra set_sign |now go set the sign
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EXT_RZ:
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leal EXT_PLRG,%a1 |answer is +/- large number
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bra set_sign |now go set the sign
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EXT_RM:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs e_rm_pos
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e_rm_neg:
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leal EXT_PINF,%a1 |answer is negative infinity
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orl #neginf_mask,USER_FPSR(%a6)
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bra end_ovfr
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e_rm_pos:
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leal EXT_PLRG,%a1 |answer is large positive number
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bra end_ovfr
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EXT_RP:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs e_rp_pos
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e_rp_neg:
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leal EXT_PLRG,%a1 |answer is large negative number
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bsetb #neg_bit,FPSR_CC(%a6)
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bra end_ovfr
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e_rp_pos:
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leal EXT_PINF,%a1 |answer is positive infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bra end_ovfr
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|case DEST_FMT = DBL
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DBL_RN:
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leal EXT_PINF,%a1 |answer is +/- infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bra set_sign
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DBL_RZ:
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leal DBL_PLRG,%a1 |answer is +/- large number
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bra set_sign |now go set the sign
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DBL_RM:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs d_rm_pos
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d_rm_neg:
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leal EXT_PINF,%a1 |answer is negative infinity
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orl #neginf_mask,USER_FPSR(%a6)
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bra end_ovfr |inf is same for all precisions (ext,dbl,sgl)
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d_rm_pos:
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leal DBL_PLRG,%a1 |answer is large positive number
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bra end_ovfr
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DBL_RP:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs d_rp_pos
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d_rp_neg:
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leal DBL_PLRG,%a1 |answer is large negative number
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bsetb #neg_bit,FPSR_CC(%a6)
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bra end_ovfr
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d_rp_pos:
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leal EXT_PINF,%a1 |answer is positive infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bra end_ovfr
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|case DEST_FMT = SGL
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SGL_RN:
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leal EXT_PINF,%a1 |answer is +/- infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bras set_sign
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SGL_RZ:
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leal SGL_PLRG,%a1 |answer is +/- large number
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bras set_sign
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SGL_RM:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs s_rm_pos
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s_rm_neg:
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leal EXT_PINF,%a1 |answer is negative infinity
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orl #neginf_mask,USER_FPSR(%a6)
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bras end_ovfr
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s_rm_pos:
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leal SGL_PLRG,%a1 |answer is large positive number
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bras end_ovfr
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SGL_RP:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs s_rp_pos
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s_rp_neg:
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leal SGL_PLRG,%a1 |answer is large negative number
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bsetb #neg_bit,FPSR_CC(%a6)
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bras end_ovfr
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s_rp_pos:
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leal EXT_PINF,%a1 |answer is positive infinity
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bsetb #inf_bit,FPSR_CC(%a6)
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bras end_ovfr
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set_sign:
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tstb LOCAL_SGN(%a0) |if negative overflow
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beqs end_ovfr
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neg_sign:
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bsetb #neg_bit,FPSR_CC(%a6)
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end_ovfr:
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movew LOCAL_EX(%a1),LOCAL_EX(%a0) |do not overwrite sign
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movel LOCAL_HI(%a1),LOCAL_HI(%a0)
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movel LOCAL_LO(%a1),LOCAL_LO(%a0)
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rts
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| ERROR
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error:
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rts
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| get_fline --- get f-line opcode of interrupted instruction
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| Returns opcode in the low word of d0.
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get_fline:
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movel USER_FPIAR(%a6),%a0 |opcode address
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movel #0,-(%a7) |reserve a word on the stack
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leal 2(%a7),%a1 |point to low word of temporary
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movel #2,%d0 |count
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bsrl mem_read
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movel (%a7)+,%d0
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rts
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| g_rndpr --- put rounding precision in d0{1:0}
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| valid return codes are:
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| 00 - extended
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| 01 - single
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| 10 - double
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| begin
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| get rounding precision (cmdreg3b{6:5})
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| begin
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| case opclass = 011 (move out)
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| get destination format - this is the also the rounding precision
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| case opclass = 0x0
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| if E3
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| *case RndPr(from cmdreg3b{6:5} = 11 then RND_PREC = DBL
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| *case RndPr(from cmdreg3b{6:5} = 10 then RND_PREC = SGL
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| case RndPr(from cmdreg3b{6:5} = 00 | 01
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| use precision from FPCR{7:6}
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| case 00 then RND_PREC = EXT
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| case 01 then RND_PREC = SGL
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| case 10 then RND_PREC = DBL
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| else E1
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| use precision in FPCR{7:6}
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| case 00 then RND_PREC = EXT
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| case 01 then RND_PREC = SGL
|
||
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| case 10 then RND_PREC = DBL
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| end
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g_rndpr:
|
||
|
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bsr g_opcls |get opclass in d0{2:0}
|
||
|
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cmpw #0x0003,%d0 |check for opclass 011
|
||
|
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bnes op_0x0
|
||
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|
||
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|
||
|
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| For move out instructions (opclass 011) the destination format
|
||
|
|
| is the same as the rounding precision. Pass results from g_dfmtou.
|
||
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|
||
|
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bsr g_dfmtou
|
||
|
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rts
|
||
|
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op_0x0:
|
||
|
|
btstb #E3,E_BYTE(%a6)
|
||
|
|
beql unf_e1_exc |branch to e1 underflow
|
||
|
|
unf_e3_exc:
|
||
|
|
movel CMDREG3B(%a6),%d0 |rounding precision in d0{10:9}
|
||
|
|
bfextu %d0{#9:#2},%d0 |move the rounding prec bits to d0{1:0}
|
||
|
|
cmpil #0x2,%d0
|
||
|
|
beql unff_sgl |force precision is single
|
||
|
|
cmpil #0x3,%d0 |force precision is double
|
||
|
|
beql unff_dbl
|
||
|
|
movew CMDREG3B(%a6),%d0 |get the command word again
|
||
|
|
andil #0x7f,%d0 |clear all except operation
|
||
|
|
cmpil #0x33,%d0
|
||
|
|
beql unf_fsgl |fsglmul or fsgldiv
|
||
|
|
cmpil #0x30,%d0
|
||
|
|
beql unf_fsgl |fsgldiv or fsglmul
|
||
|
|
bra unf_fpcr
|
||
|
|
unf_e1_exc:
|
||
|
|
movel CMDREG1B(%a6),%d0 |get 32 bits off the stack, 1st 16 bits
|
||
|
|
| ;are the command word
|
||
|
|
andil #0x00440000,%d0 |clear all bits except bits 6 and 2
|
||
|
|
cmpil #0x00400000,%d0
|
||
|
|
beql unff_sgl |force single
|
||
|
|
cmpil #0x00440000,%d0 |force double
|
||
|
|
beql unff_dbl
|
||
|
|
movel CMDREG1B(%a6),%d0 |get the command word again
|
||
|
|
andil #0x007f0000,%d0 |clear all bits except the operation
|
||
|
|
cmpil #0x00270000,%d0
|
||
|
|
beql unf_fsgl |fsglmul
|
||
|
|
cmpil #0x00240000,%d0
|
||
|
|
beql unf_fsgl |fsgldiv
|
||
|
|
bra unf_fpcr
|
||
|
|
|
||
|
|
|
|
||
|
|
| Convert to return format. The values from cmdreg3b and the return
|
||
|
|
| values are:
|
||
|
|
| cmdreg3b return precision
|
||
|
|
| -------- ------ ---------
|
||
|
|
| 00,01 0 ext
|
||
|
|
| 10 1 sgl
|
||
|
|
| 11 2 dbl
|
||
|
|
| Force single
|
||
|
|
|
|
||
|
|
unff_sgl:
|
||
|
|
movel #1,%d0 |return 1
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| Force double
|
||
|
|
|
|
||
|
|
unff_dbl:
|
||
|
|
movel #2,%d0 |return 2
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| Force extended
|
||
|
|
|
|
||
|
|
unf_fsgl:
|
||
|
|
movel #0,%d0
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| Get rounding precision set in FPCR{7:6}.
|
||
|
|
|
|
||
|
|
unf_fpcr:
|
||
|
|
movel USER_FPCR(%a6),%d0 |rounding precision bits in d0{7:6}
|
||
|
|
bfextu %d0{#24:#2},%d0 |move the rounding prec bits to d0{1:0}
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| g_opcls --- put opclass in d0{2:0}
|
||
|
|
|
|
||
|
|
g_opcls:
|
||
|
|
btstb #E3,E_BYTE(%a6)
|
||
|
|
beqs opc_1b |if set, go to cmdreg1b
|
||
|
|
opc_3b:
|
||
|
|
clrl %d0 |if E3, only opclass 0x0 is possible
|
||
|
|
rts
|
||
|
|
opc_1b:
|
||
|
|
movel CMDREG1B(%a6),%d0
|
||
|
|
bfextu %d0{#0:#3},%d0 |shift opclass bits d0{31:29} to d0{2:0}
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| g_dfmtou --- put destination format in d0{1:0}
|
||
|
|
|
|
||
|
|
| If E1, the format is from cmdreg1b{12:10}
|
||
|
|
| If E3, the format is extended.
|
||
|
|
|
|
||
|
|
| Dest. Fmt.
|
||
|
|
| extended 010 -> 00
|
||
|
|
| single 001 -> 01
|
||
|
|
| double 101 -> 10
|
||
|
|
|
|
||
|
|
g_dfmtou:
|
||
|
|
btstb #E3,E_BYTE(%a6)
|
||
|
|
beqs op011
|
||
|
|
clrl %d0 |if E1, size is always ext
|
||
|
|
rts
|
||
|
|
op011:
|
||
|
|
movel CMDREG1B(%a6),%d0
|
||
|
|
bfextu %d0{#3:#3},%d0 |dest fmt from cmdreg1b{12:10}
|
||
|
|
cmpb #1,%d0 |check for single
|
||
|
|
bnes not_sgl
|
||
|
|
movel #1,%d0
|
||
|
|
rts
|
||
|
|
not_sgl:
|
||
|
|
cmpb #5,%d0 |check for double
|
||
|
|
bnes not_dbl
|
||
|
|
movel #2,%d0
|
||
|
|
rts
|
||
|
|
not_dbl:
|
||
|
|
clrl %d0 |must be extended
|
||
|
|
rts
|
||
|
|
|
||
|
|
|
|
||
|
|
|
|
||
|
|
| Final result table for unf_sub. Note that the negative counterparts
|
||
|
|
| are unnecessary as unf_sub always returns the sign separately from
|
||
|
|
| the exponent.
|
||
|
|
| ;+zero
|
||
|
|
EXT_PZRO: .long 0x00000000,0x00000000,0x00000000,0x00000000
|
||
|
|
| ;+zero
|
||
|
|
SGL_PZRO: .long 0x3f810000,0x00000000,0x00000000,0x00000000
|
||
|
|
| ;+zero
|
||
|
|
DBL_PZRO: .long 0x3c010000,0x00000000,0x00000000,0x00000000
|
||
|
|
| ;smallest +ext denorm
|
||
|
|
EXT_PSML: .long 0x00000000,0x00000000,0x00000001,0x00000000
|
||
|
|
| ;smallest +sgl denorm
|
||
|
|
SGL_PSML: .long 0x3f810000,0x00000100,0x00000000,0x00000000
|
||
|
|
| ;smallest +dbl denorm
|
||
|
|
DBL_PSML: .long 0x3c010000,0x00000000,0x00000800,0x00000000
|
||
|
|
|
|
||
|
|
| UNF_SUB --- underflow result calculation
|
||
|
|
|
|
||
|
|
| Input:
|
||
|
|
| d0 contains round precision
|
||
|
|
| a0 points to input operand in the internal extended format
|
||
|
|
|
|
||
|
|
| Output:
|
||
|
|
| a0 points to correct internal extended precision result.
|
||
|
|
|
|
||
|
|
|
||
|
|
tblunf:
|
||
|
|
.long uEXT_RN
|
||
|
|
.long uEXT_RZ
|
||
|
|
.long uEXT_RM
|
||
|
|
.long uEXT_RP
|
||
|
|
.long uSGL_RN
|
||
|
|
.long uSGL_RZ
|
||
|
|
.long uSGL_RM
|
||
|
|
.long uSGL_RP
|
||
|
|
.long uDBL_RN
|
||
|
|
.long uDBL_RZ
|
||
|
|
.long uDBL_RM
|
||
|
|
.long uDBL_RP
|
||
|
|
.long uDBL_RN
|
||
|
|
.long uDBL_RZ
|
||
|
|
.long uDBL_RM
|
||
|
|
.long uDBL_RP
|
||
|
|
|
||
|
|
.global unf_sub
|
||
|
|
unf_sub:
|
||
|
|
lsll #2,%d0 |move round precision to d0{3:2}
|
||
|
|
bfextu FPCR_MODE(%a6){#2:#2},%d1 |set round mode
|
||
|
|
orl %d1,%d0 |index is fmt:mode in d0{3:0}
|
||
|
|
leal tblunf,%a1 |load a1 with table address
|
||
|
|
movel %a1@(%d0:l:4),%a1 |use d0 as index to the table
|
||
|
|
jmp (%a1) |go to the correct routine
|
||
|
|
|
|
||
|
|
|case DEST_FMT = EXT
|
||
|
|
|
|
||
|
|
uEXT_RN:
|
||
|
|
leal EXT_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra uset_sign |now go set the sign
|
||
|
|
uEXT_RZ:
|
||
|
|
leal EXT_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra uset_sign |now go set the sign
|
||
|
|
uEXT_RM:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative underflow
|
||
|
|
beqs ue_rm_pos
|
||
|
|
ue_rm_neg:
|
||
|
|
leal EXT_PSML,%a1 |answer is negative smallest denorm
|
||
|
|
bsetb #neg_bit,FPSR_CC(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
ue_rm_pos:
|
||
|
|
leal EXT_PZRO,%a1 |answer is positive zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
uEXT_RP:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative underflow
|
||
|
|
beqs ue_rp_pos
|
||
|
|
ue_rp_neg:
|
||
|
|
leal EXT_PZRO,%a1 |answer is negative zero
|
||
|
|
oril #negz_mask,USER_FPSR(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
ue_rp_pos:
|
||
|
|
leal EXT_PSML,%a1 |answer is positive smallest denorm
|
||
|
|
bra end_unfr
|
||
|
|
|
|
||
|
|
|case DEST_FMT = DBL
|
||
|
|
|
|
||
|
|
uDBL_RN:
|
||
|
|
leal DBL_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra uset_sign
|
||
|
|
uDBL_RZ:
|
||
|
|
leal DBL_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra uset_sign |now go set the sign
|
||
|
|
uDBL_RM:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative overflow
|
||
|
|
beqs ud_rm_pos
|
||
|
|
ud_rm_neg:
|
||
|
|
leal DBL_PSML,%a1 |answer is smallest denormalized negative
|
||
|
|
bsetb #neg_bit,FPSR_CC(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
ud_rm_pos:
|
||
|
|
leal DBL_PZRO,%a1 |answer is positive zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
uDBL_RP:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative overflow
|
||
|
|
beqs ud_rp_pos
|
||
|
|
ud_rp_neg:
|
||
|
|
leal DBL_PZRO,%a1 |answer is negative zero
|
||
|
|
oril #negz_mask,USER_FPSR(%a6)
|
||
|
|
bra end_unfr
|
||
|
|
ud_rp_pos:
|
||
|
|
leal DBL_PSML,%a1 |answer is smallest denormalized negative
|
||
|
|
bra end_unfr
|
||
|
|
|
|
||
|
|
|case DEST_FMT = SGL
|
||
|
|
|
|
||
|
|
uSGL_RN:
|
||
|
|
leal SGL_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bras uset_sign
|
||
|
|
uSGL_RZ:
|
||
|
|
leal SGL_PZRO,%a1 |answer is +/- zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bras uset_sign
|
||
|
|
uSGL_RM:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative overflow
|
||
|
|
beqs us_rm_pos
|
||
|
|
us_rm_neg:
|
||
|
|
leal SGL_PSML,%a1 |answer is smallest denormalized negative
|
||
|
|
bsetb #neg_bit,FPSR_CC(%a6)
|
||
|
|
bras end_unfr
|
||
|
|
us_rm_pos:
|
||
|
|
leal SGL_PZRO,%a1 |answer is positive zero
|
||
|
|
bsetb #z_bit,FPSR_CC(%a6)
|
||
|
|
bras end_unfr
|
||
|
|
uSGL_RP:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative overflow
|
||
|
|
beqs us_rp_pos
|
||
|
|
us_rp_neg:
|
||
|
|
leal SGL_PZRO,%a1 |answer is negative zero
|
||
|
|
oril #negz_mask,USER_FPSR(%a6)
|
||
|
|
bras end_unfr
|
||
|
|
us_rp_pos:
|
||
|
|
leal SGL_PSML,%a1 |answer is smallest denormalized positive
|
||
|
|
bras end_unfr
|
||
|
|
|
||
|
|
uset_sign:
|
||
|
|
tstb LOCAL_SGN(%a0) |if negative overflow
|
||
|
|
beqs end_unfr
|
||
|
|
uneg_sign:
|
||
|
|
bsetb #neg_bit,FPSR_CC(%a6)
|
||
|
|
|
||
|
|
end_unfr:
|
||
|
|
movew LOCAL_EX(%a1),LOCAL_EX(%a0) |be careful not to overwrite sign
|
||
|
|
movel LOCAL_HI(%a1),LOCAL_HI(%a0)
|
||
|
|
movel LOCAL_LO(%a1),LOCAL_LO(%a0)
|
||
|
|
rts
|
||
|
|
|
|
||
|
|
| reg_dest --- write byte, word, or long data to Dn
|
||
|
|
|
|
||
|
|
|
|
||
|
|
| Input:
|
||
|
|
| L_SCR1: Data
|
||
|
|
| d1: data size and dest register number formatted as:
|
||
|
|
|
|
||
|
|
| 32 5 4 3 2 1 0
|
||
|
|
| -----------------------------------------------
|
||
|
|
| | 0 | Size | Dest Reg # |
|
||
|
|
| -----------------------------------------------
|
||
|
|
|
|
||
|
|
| Size is:
|
||
|
|
| 0 - Byte
|
||
|
|
| 1 - Word
|
||
|
|
| 2 - Long/Single
|
||
|
|
|
|
||
|
|
pregdst:
|
||
|
|
.long byte_d0
|
||
|
|
.long byte_d1
|
||
|
|
.long byte_d2
|
||
|
|
.long byte_d3
|
||
|
|
.long byte_d4
|
||
|
|
.long byte_d5
|
||
|
|
.long byte_d6
|
||
|
|
.long byte_d7
|
||
|
|
.long word_d0
|
||
|
|
.long word_d1
|
||
|
|
.long word_d2
|
||
|
|
.long word_d3
|
||
|
|
.long word_d4
|
||
|
|
.long word_d5
|
||
|
|
.long word_d6
|
||
|
|
.long word_d7
|
||
|
|
.long long_d0
|
||
|
|
.long long_d1
|
||
|
|
.long long_d2
|
||
|
|
.long long_d3
|
||
|
|
.long long_d4
|
||
|
|
.long long_d5
|
||
|
|
.long long_d6
|
||
|
|
.long long_d7
|
||
|
|
|
||
|
|
reg_dest:
|
||
|
|
leal pregdst,%a0
|
||
|
|
movel %a0@(%d1:l:4),%a0
|
||
|
|
jmp (%a0)
|
||
|
|
|
||
|
|
byte_d0:
|
||
|
|
moveb L_SCR1(%a6),USER_D0+3(%a6)
|
||
|
|
rts
|
||
|
|
byte_d1:
|
||
|
|
moveb L_SCR1(%a6),USER_D1+3(%a6)
|
||
|
|
rts
|
||
|
|
byte_d2:
|
||
|
|
moveb L_SCR1(%a6),%d2
|
||
|
|
rts
|
||
|
|
byte_d3:
|
||
|
|
moveb L_SCR1(%a6),%d3
|
||
|
|
rts
|
||
|
|
byte_d4:
|
||
|
|
moveb L_SCR1(%a6),%d4
|
||
|
|
rts
|
||
|
|
byte_d5:
|
||
|
|
moveb L_SCR1(%a6),%d5
|
||
|
|
rts
|
||
|
|
byte_d6:
|
||
|
|
moveb L_SCR1(%a6),%d6
|
||
|
|
rts
|
||
|
|
byte_d7:
|
||
|
|
moveb L_SCR1(%a6),%d7
|
||
|
|
rts
|
||
|
|
word_d0:
|
||
|
|
movew L_SCR1(%a6),USER_D0+2(%a6)
|
||
|
|
rts
|
||
|
|
word_d1:
|
||
|
|
movew L_SCR1(%a6),USER_D1+2(%a6)
|
||
|
|
rts
|
||
|
|
word_d2:
|
||
|
|
movew L_SCR1(%a6),%d2
|
||
|
|
rts
|
||
|
|
word_d3:
|
||
|
|
movew L_SCR1(%a6),%d3
|
||
|
|
rts
|
||
|
|
word_d4:
|
||
|
|
movew L_SCR1(%a6),%d4
|
||
|
|
rts
|
||
|
|
word_d5:
|
||
|
|
movew L_SCR1(%a6),%d5
|
||
|
|
rts
|
||
|
|
word_d6:
|
||
|
|
movew L_SCR1(%a6),%d6
|
||
|
|
rts
|
||
|
|
word_d7:
|
||
|
|
movew L_SCR1(%a6),%d7
|
||
|
|
rts
|
||
|
|
long_d0:
|
||
|
|
movel L_SCR1(%a6),USER_D0(%a6)
|
||
|
|
rts
|
||
|
|
long_d1:
|
||
|
|
movel L_SCR1(%a6),USER_D1(%a6)
|
||
|
|
rts
|
||
|
|
long_d2:
|
||
|
|
movel L_SCR1(%a6),%d2
|
||
|
|
rts
|
||
|
|
long_d3:
|
||
|
|
movel L_SCR1(%a6),%d3
|
||
|
|
rts
|
||
|
|
long_d4:
|
||
|
|
movel L_SCR1(%a6),%d4
|
||
|
|
rts
|
||
|
|
long_d5:
|
||
|
|
movel L_SCR1(%a6),%d5
|
||
|
|
rts
|
||
|
|
long_d6:
|
||
|
|
movel L_SCR1(%a6),%d6
|
||
|
|
rts
|
||
|
|
long_d7:
|
||
|
|
movel L_SCR1(%a6),%d7
|
||
|
|
rts
|
||
|
|
|end
|