443 lines
12 KiB
C
443 lines
12 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MSHYPER_H
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#define _ASM_X86_MSHYPER_H
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#include <linux/types.h>
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#include <linux/atomic.h>
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#include <linux/nmi.h>
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#include <asm/io.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/nospec-branch.h>
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#define VP_INVAL U32_MAX
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struct ms_hyperv_info {
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u32 features;
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u32 misc_features;
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u32 hints;
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u32 nested_features;
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u32 max_vp_index;
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u32 max_lp_index;
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};
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extern struct ms_hyperv_info ms_hyperv;
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/*
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* Generate the guest ID.
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*/
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static inline __u64 generate_guest_id(__u64 d_info1, __u64 kernel_version,
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__u64 d_info2)
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{
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__u64 guest_id = 0;
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guest_id = (((__u64)HV_LINUX_VENDOR_ID) << 48);
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guest_id |= (d_info1 << 48);
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guest_id |= (kernel_version << 16);
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guest_id |= d_info2;
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return guest_id;
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}
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/* Free the message slot and signal end-of-message if required */
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static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
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{
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/*
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* On crash we're reading some other CPU's message page and we need
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* to be careful: this other CPU may already had cleared the header
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* and the host may already had delivered some other message there.
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* In case we blindly write msg->header.message_type we're going
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* to lose it. We can still lose a message of the same type but
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* we count on the fact that there can only be one
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* CHANNELMSG_UNLOAD_RESPONSE and we don't care about other messages
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* on crash.
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*/
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if (cmpxchg(&msg->header.message_type, old_msg_type,
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HVMSG_NONE) != old_msg_type)
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return;
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/*
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* Make sure the write to MessageType (ie set to
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* HVMSG_NONE) happens before we read the
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* MessagePending and EOMing. Otherwise, the EOMing
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* will not deliver any more messages since there is
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* no empty slot
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*/
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mb();
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if (msg->header.message_flags.msg_pending) {
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/*
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* This will cause message queue rescan to
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* possibly deliver another msg from the
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* hypervisor
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*/
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wrmsrl(HV_X64_MSR_EOM, 0);
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}
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}
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#define hv_init_timer(timer, tick) \
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wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick)
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#define hv_init_timer_config(timer, val) \
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wrmsrl(HV_X64_MSR_STIMER0_CONFIG + (2*timer), val)
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#define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val)
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#define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val)
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#define hv_get_siefp(val) rdmsrl(HV_X64_MSR_SIEFP, val)
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#define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val)
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#define hv_get_synic_state(val) rdmsrl(HV_X64_MSR_SCONTROL, val)
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#define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val)
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#define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
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#define hv_get_synint_state(int_num, val) \
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rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
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#define hv_set_synint_state(int_num, val) \
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wrmsrl(HV_X64_MSR_SINT0 + int_num, val)
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#define hv_get_crash_ctl(val) \
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rdmsrl(HV_X64_MSR_CRASH_CTL, val)
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void hyperv_callback_vector(void);
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void hyperv_reenlightenment_vector(void);
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#ifdef CONFIG_TRACING
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#define trace_hyperv_callback_vector hyperv_callback_vector
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#endif
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void hyperv_vector_handler(struct pt_regs *regs);
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void hv_setup_vmbus_irq(void (*handler)(void));
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void hv_remove_vmbus_irq(void);
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void hv_setup_kexec_handler(void (*handler)(void));
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void hv_remove_kexec_handler(void);
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void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs));
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void hv_remove_crash_handler(void);
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/*
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* Routines for stimer0 Direct Mode handling.
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* On x86/x64, there are no percpu actions to take.
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*/
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void hv_stimer0_vector_handler(struct pt_regs *regs);
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void hv_stimer0_callback_vector(void);
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int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void));
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void hv_remove_stimer0_irq(int irq);
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static inline void hv_enable_stimer0_percpu_irq(int irq) {}
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static inline void hv_disable_stimer0_percpu_irq(int irq) {}
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#if IS_ENABLED(CONFIG_HYPERV)
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extern struct clocksource *hyperv_cs;
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extern void *hv_hypercall_pg;
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extern void __percpu **hyperv_pcpu_input_arg;
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static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
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{
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u64 input_address = input ? virt_to_phys(input) : 0;
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u64 output_address = output ? virt_to_phys(output) : 0;
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u64 hv_status;
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#ifdef CONFIG_X86_64
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input_address)
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: "r" (output_address),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory", "r8", "r9", "r10", "r11");
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#else
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u32 input_address_hi = upper_32_bits(input_address);
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u32 input_address_lo = lower_32_bits(input_address);
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u32 output_address_hi = upper_32_bits(output_address);
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u32 output_address_lo = lower_32_bits(output_address);
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__(CALL_NOSPEC
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: "=A" (hv_status),
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"+c" (input_address_lo), ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input_address_hi),
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"D"(output_address_hi), "S"(output_address_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory");
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#endif /* !x86_64 */
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return hv_status;
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}
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/* Fast hypercall with 8 bytes of input and no output */
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static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
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{
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u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
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#ifdef CONFIG_X86_64
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{
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__asm__ __volatile__(CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo),
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ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input1_hi),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "edi", "esi");
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}
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#endif
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return hv_status;
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}
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/* Fast hypercall with 16 bytes of input */
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static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
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{
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u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
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#ifdef CONFIG_X86_64
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{
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: "r" (input2),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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u32 input2_hi = upper_32_bits(input2);
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u32 input2_lo = lower_32_bits(input2);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo), ASM_CALL_CONSTRAINT
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: "A" (control), "b" (input1_hi),
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"D"(input2_hi), "S"(input2_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc");
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}
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#endif
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return hv_status;
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}
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/*
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* Rep hypercalls. Callers of this functions are supposed to ensure that
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* rep_count and varhead_size comply with Hyper-V hypercall definition.
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*/
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static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 varhead_size,
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void *input, void *output)
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{
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u64 control = code;
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u64 status;
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u16 rep_comp;
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control |= (u64)varhead_size << HV_HYPERCALL_VARHEAD_OFFSET;
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control |= (u64)rep_count << HV_HYPERCALL_REP_COMP_OFFSET;
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do {
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status = hv_do_hypercall(control, input, output);
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if ((status & HV_HYPERCALL_RESULT_MASK) != HV_STATUS_SUCCESS)
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return status;
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/* Bits 32-43 of status have 'Reps completed' data. */
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rep_comp = (status & HV_HYPERCALL_REP_COMP_MASK) >>
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HV_HYPERCALL_REP_COMP_OFFSET;
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control &= ~HV_HYPERCALL_REP_START_MASK;
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control |= (u64)rep_comp << HV_HYPERCALL_REP_START_OFFSET;
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touch_nmi_watchdog();
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} while (rep_comp < rep_count);
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return status;
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}
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/*
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* Hypervisor's notion of virtual processor ID is different from
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* Linux' notion of CPU ID. This information can only be retrieved
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* in the context of the calling CPU. Setup a map for easy access
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* to this information.
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*/
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extern u32 *hv_vp_index;
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extern u32 hv_max_vp_index;
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extern struct hv_vp_assist_page **hv_vp_assist_page;
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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if (!hv_vp_assist_page)
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return NULL;
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return hv_vp_assist_page[cpu];
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}
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/**
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* hv_cpu_number_to_vp_number() - Map CPU to VP.
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* @cpu_number: CPU number in Linux terms
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*
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* This function returns the mapping between the Linux processor
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* number and the hypervisor's virtual processor number, useful
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* in making hypercalls and such that talk about specific
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* processors.
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*
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* Return: Virtual processor number in Hyper-V terms
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*/
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static inline int hv_cpu_number_to_vp_number(int cpu_number)
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{
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return hv_vp_index[cpu_number];
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}
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static inline int cpumask_to_vpset(struct hv_vpset *vpset,
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const struct cpumask *cpus)
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{
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int cpu, vcpu, vcpu_bank, vcpu_offset, nr_bank = 1;
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/* valid_bank_mask can represent up to 64 banks */
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if (hv_max_vp_index / 64 >= 64)
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return 0;
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/*
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* Clear all banks up to the maximum possible bank as hv_tlb_flush_ex
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* structs are not cleared between calls, we risk flushing unneeded
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* vCPUs otherwise.
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*/
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for (vcpu_bank = 0; vcpu_bank <= hv_max_vp_index / 64; vcpu_bank++)
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vpset->bank_contents[vcpu_bank] = 0;
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/*
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* Some banks may end up being empty but this is acceptable.
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*/
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for_each_cpu(cpu, cpus) {
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vcpu = hv_cpu_number_to_vp_number(cpu);
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if (vcpu == VP_INVAL)
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return -1;
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vcpu_bank = vcpu / 64;
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vcpu_offset = vcpu % 64;
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__set_bit(vcpu_offset, (unsigned long *)
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&vpset->bank_contents[vcpu_bank]);
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if (vcpu_bank >= nr_bank)
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nr_bank = vcpu_bank + 1;
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}
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vpset->valid_bank_mask = GENMASK_ULL(nr_bank - 1, 0);
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return nr_bank;
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}
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void __init hyperv_init(void);
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void hyperv_setup_mmu_ops(void);
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void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die);
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void hyperv_report_panic_msg(phys_addr_t pa, size_t size);
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bool hv_is_hyperv_initialized(void);
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void hyperv_cleanup(void);
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void hyperv_reenlightenment_intr(struct pt_regs *regs);
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void set_hv_tscchange_cb(void (*cb)(void));
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void clear_hv_tscchange_cb(void);
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void hyperv_stop_tsc_emulation(void);
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int hyperv_flush_guest_mapping(u64 as);
|
||
|
|
|
||
|
|
#ifdef CONFIG_X86_64
|
||
|
|
void hv_apic_init(void);
|
||
|
|
#else
|
||
|
|
static inline void hv_apic_init(void) {}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#else /* CONFIG_HYPERV */
|
||
|
|
static inline void hyperv_init(void) {}
|
||
|
|
static inline bool hv_is_hyperv_initialized(void) { return false; }
|
||
|
|
static inline void hyperv_cleanup(void) {}
|
||
|
|
static inline void hyperv_setup_mmu_ops(void) {}
|
||
|
|
static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
|
||
|
|
static inline void clear_hv_tscchange_cb(void) {}
|
||
|
|
static inline void hyperv_stop_tsc_emulation(void) {};
|
||
|
|
static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
|
||
|
|
{
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
|
||
|
|
#endif /* CONFIG_HYPERV */
|
||
|
|
|
||
|
|
#ifdef CONFIG_HYPERV_TSCPAGE
|
||
|
|
struct ms_hyperv_tsc_page *hv_get_tsc_page(void);
|
||
|
|
static inline u64 hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg,
|
||
|
|
u64 *cur_tsc)
|
||
|
|
{
|
||
|
|
u64 scale, offset;
|
||
|
|
u32 sequence;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The protocol for reading Hyper-V TSC page is specified in Hypervisor
|
||
|
|
* Top-Level Functional Specification ver. 3.0 and above. To get the
|
||
|
|
* reference time we must do the following:
|
||
|
|
* - READ ReferenceTscSequence
|
||
|
|
* A special '0' value indicates the time source is unreliable and we
|
||
|
|
* need to use something else. The currently published specification
|
||
|
|
* versions (up to 4.0b) contain a mistake and wrongly claim '-1'
|
||
|
|
* instead of '0' as the special value, see commit c35b82ef0294.
|
||
|
|
* - ReferenceTime =
|
||
|
|
* ((RDTSC() * ReferenceTscScale) >> 64) + ReferenceTscOffset
|
||
|
|
* - READ ReferenceTscSequence again. In case its value has changed
|
||
|
|
* since our first reading we need to discard ReferenceTime and repeat
|
||
|
|
* the whole sequence as the hypervisor was updating the page in
|
||
|
|
* between.
|
||
|
|
*/
|
||
|
|
do {
|
||
|
|
sequence = READ_ONCE(tsc_pg->tsc_sequence);
|
||
|
|
if (!sequence)
|
||
|
|
return U64_MAX;
|
||
|
|
/*
|
||
|
|
* Make sure we read sequence before we read other values from
|
||
|
|
* TSC page.
|
||
|
|
*/
|
||
|
|
smp_rmb();
|
||
|
|
|
||
|
|
scale = READ_ONCE(tsc_pg->tsc_scale);
|
||
|
|
offset = READ_ONCE(tsc_pg->tsc_offset);
|
||
|
|
*cur_tsc = rdtsc_ordered();
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Make sure we read sequence after we read all other values
|
||
|
|
* from TSC page.
|
||
|
|
*/
|
||
|
|
smp_rmb();
|
||
|
|
|
||
|
|
} while (READ_ONCE(tsc_pg->tsc_sequence) != sequence);
|
||
|
|
|
||
|
|
return mul_u64_u64_shr(*cur_tsc, scale, 64) + offset;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline u64 hv_read_tsc_page(const struct ms_hyperv_tsc_page *tsc_pg)
|
||
|
|
{
|
||
|
|
u64 cur_tsc;
|
||
|
|
|
||
|
|
return hv_read_tsc_page_tsc(tsc_pg, &cur_tsc);
|
||
|
|
}
|
||
|
|
|
||
|
|
#else
|
||
|
|
static inline struct ms_hyperv_tsc_page *hv_get_tsc_page(void)
|
||
|
|
{
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline u64 hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg,
|
||
|
|
u64 *cur_tsc)
|
||
|
|
{
|
||
|
|
BUG();
|
||
|
|
return U64_MAX;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
#endif
|