41 lines
1.6 KiB
C
41 lines
1.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef _DT_BINDINGS_GCE_MT6382_H
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#define _DT_BINDINGS_GCE_MT6382_H
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/* GCE hardware events */
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#define CMDQ_BRIDGE_EVENT_DISP_DSC_WRAP0_CORE0_SOF 0
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#define CMDQ_BRIDGE_EVENT_DISP_DSC_WRAP0_CORE1_SOF 1
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#define CMDQ_BRIDGE_EVENT_DISP_RDMA0_SOF 2
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#define CMDQ_BRIDGE_EVENT_DISP_DSI0_SOF 3
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#define CMDQ_BRIDGE_EVENT_DISP_DSC_WRAP0_CORE0_FRAME_DONE 4
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#define CMDQ_BRIDGE_EVENT_DISP_DSC_WRAP0_CORE1_FRAME_DONE 5
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#define CMDQ_BRIDGE_EVENT_DISP_RDMA0_FRAME_DONE 6
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#define CMDQ_BRIDGE_EVENT_DSI_FRAME_DONE 7
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#define CMDQ_BRIDGE_EVENT_STREAM_DONE_ENG_EVENT_0 8
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#define CMDQ_BRIDGE_EVENT_STREAM_DONE_ENG_EVENT_1 9
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#define CMDQ_BRIDGE_EVENT_STREAM_DONE_ENG_EVENT_2 10
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#define CMDQ_BRIDGE_EVENT_DSI0_TE_ENG_EVENT 11
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#define CMDQ_BRIDGE_EVENT_DSI0_IRQ_ENG_EVENT 12
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#define CMDQ_BRIDGE_EVENT_DSI0_DONE_ENG_EVENT 13
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#define CMDQ_BRIDGE_EVENT_DSI0_TARGET_LINE_EVENT 14
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#define CMDQ_BRIDGE_EVENT_DSI0_PHY_READY_EVENT 15
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#define CMDQ_BRIDGE_EVENT_DISP_RDMA0_TARGET_LINE_ENG_EVENT 16
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_0 17
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_1 18
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_2 19
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_3 20
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_4 21
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_5 22
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_6 23
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_7 24
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#define CMDQ_BRIDGE_EVENT_BUF_UNDERRUN_ENG_EVENT_8 25
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#define CMDQ_BRIDGE_EVENT_GCE_EVENT_0 898
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#define CMDQ_BRIDGE_EVENT_GCE_EVENT_1 899
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#endif
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