524 lines
14 KiB
C
524 lines
14 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#if IS_ENABLED(CONFIG_DEBUG_FS)
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#include <linux/debugfs.h>
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#endif
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#if IS_ENABLED(CONFIG_PROC_FS)
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#include <linux/proc_fs.h>
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#endif
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/uaccess.h>
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#include <drm/drmP.h>
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_drm_plane.h"
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#include "mtk_drm_crtc.h"
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#include "mtk_drm_drv.h"
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#include "mtk_drm_debugfs.h"
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struct mtk_drm_debugfs_table {
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char name[8];
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unsigned int offset[2];
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unsigned int length[2];
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unsigned long reg_base;
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};
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/* ------------------------------------------------------------------------- */
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/* External variable declarations */
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/* ------------------------------------------------------------------------- */
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static void __iomem *gdrm_disp1_base[12];
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static void __iomem *gdrm_disp2_base[7];
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static struct mtk_drm_debugfs_table gdrm_disp1_reg_range[7] = {
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{"OVL0 ", {0, 0xf40}, {0x260, 0x80}, 0},
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{"COLOR0 ", {0x400, 0xc00}, {0x400, 0x100}, 0},
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{"AAL0 ", {0, 0}, {0x100, 0}, 0},
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{"OD0 ", {0, 0}, {0x100, 0}, 0},
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{"RDMA0 ", {0, 0}, {0x100, 0}, 0},
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{"CONFIG ", {0, 0}, {0x120, 0}, 0},
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{"MUTEX ", {0, 0}, {0x100, 0}, 0} };
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static struct mtk_drm_debugfs_table gdrm_disp2_reg_range[7] = {
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{"OVL1 ", {0, 0xf40}, {0x260, 0x80}, 0},
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{"COLOR1 ", {0x400, 0xc00}, {0x100, 0x100}, 0},
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{"AAL1 ", {0, 0}, {0x100, 0}, 0},
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{"OD1 ", {0, 0}, {0x100, 0}, 0},
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{"RDMA1 ", {0, 0}, {0x100, 0}, 0},
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{"CONFIG ", {0, 0}, {0x120, 0}, 0},
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{"MUTEX ", {0, 0}, {0x100, 0}, 0} };
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static bool dbgfs_alpha;
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static void mtk_read_reg(unsigned long addr)
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{
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void __iomem *reg_va = 0;
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reg_va = ioremap_nocache(addr, sizeof(reg_va));
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pr_info("r:0x%8lx = 0x%08x\n", addr, readl(reg_va));
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iounmap(reg_va);
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}
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static void mtk_write_reg(unsigned long addr, unsigned long val)
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{
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void __iomem *reg_va = 0;
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reg_va = ioremap_nocache(addr, sizeof(reg_va));
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writel(val, reg_va);
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iounmap(reg_va);
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}
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/* ------------------------------------------------------------------------- */
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/* Debug Options */
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/* ------------------------------------------------------------------------- */
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static const char STR_HELP[] = "\n"
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"USAGE\n"
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" echo [ACTION]... > mtkdrm\n"
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"\n"
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"ACTION\n"
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"\n"
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" dump:\n"
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" dump all hw registers\n"
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"\n"
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" regw:addr=val\n"
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" write hw register\n"
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"\n"
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" regr:addr\n"
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" read hw register\n";
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/* ------------------------------------------------------------------------- */
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/* Command Processor */
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/* ------------------------------------------------------------------------- */
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static void process_dbg_opt(char *opt)
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{
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if (strncmp(opt, "regw:", 5) == 0) {
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char *p = (char *)opt + 5;
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char *np;
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unsigned long addr, val;
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u64 i;
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np = strsep(&p, "=");
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if (kstrtoul(np, 16, &addr) != 0)
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goto error;
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if (p == NULL)
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goto error;
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np = strsep(&p, "=");
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if (kstrtoul(np, 16, &val) != 0)
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goto error;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp1_reg_range); i++) {
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if (addr > gdrm_disp1_reg_range[i].reg_base &&
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addr < gdrm_disp1_reg_range[i].reg_base +
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0x1000UL) {
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writel(val, gdrm_disp1_base[i] + addr -
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gdrm_disp1_reg_range[i]
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.reg_base);
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break;
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}
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}
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for (i = 0; i < ARRAY_SIZE(gdrm_disp2_reg_range); i++) {
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if (addr > gdrm_disp2_reg_range[i].reg_base &&
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addr < gdrm_disp2_reg_range[i].reg_base +
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0x1000UL) {
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writel(val, gdrm_disp2_base[i] + addr -
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gdrm_disp2_reg_range[i]
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.reg_base);
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break;
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}
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}
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} else if (strncmp(opt, "regr:", 5) == 0) {
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char *p = (char *)opt + 5;
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unsigned long addr;
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u64 i;
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if (kstrtoul(p, 16, &addr) != 0)
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goto error;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp1_reg_range); i++) {
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if (addr >= gdrm_disp1_reg_range[i].reg_base &&
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addr < gdrm_disp1_reg_range[i].reg_base +
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0x1000UL) {
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DRM_INFO("%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp1_reg_range[i].name, addr,
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readl(gdrm_disp1_base[i] + addr -
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gdrm_disp1_reg_range[i]
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.reg_base));
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break;
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}
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}
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for (i = 0; i < ARRAY_SIZE(gdrm_disp2_reg_range); i++) {
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if (addr >= gdrm_disp2_reg_range[i].reg_base &&
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addr < gdrm_disp2_reg_range[i].reg_base +
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0x1000UL) {
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DRM_INFO("%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp2_reg_range[i].name, addr,
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readl(gdrm_disp2_base[i] + addr -
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gdrm_disp2_reg_range[i]
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.reg_base));
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break;
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}
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}
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} else if (strncmp(opt, "autoregr:", 9) == 0) {
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DRM_INFO("Set the register addr for Auto-test\n");
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} else if (strncmp(opt, "dump:", 5) == 0) {
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u64 i;
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u32 j;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp1_reg_range); i++) {
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if (gdrm_disp1_base[i] == NULL)
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continue;
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for (j = gdrm_disp1_reg_range[i].offset[0];
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j < gdrm_disp1_reg_range[i].offset[0] +
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gdrm_disp1_reg_range[i].length[0];
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j += 16UL)
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DRM_INFO("%8s 0x%08lX: %08X %08X %08X %08X\n",
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gdrm_disp1_reg_range[i].name,
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gdrm_disp1_reg_range[i].reg_base + j,
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readl(gdrm_disp1_base[i] + j),
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readl(gdrm_disp1_base[i] + j + 0x4),
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readl(gdrm_disp1_base[i] + j + 0x8),
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readl(gdrm_disp1_base[i] + j + 0xc));
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for (j = gdrm_disp1_reg_range[i].offset[1];
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j < gdrm_disp1_reg_range[i].offset[1] +
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gdrm_disp1_reg_range[i].length[1];
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j += 16UL)
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DRM_INFO("%8s 0x%08lX: %08X %08X %08X %08X\n",
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gdrm_disp1_reg_range[i].name,
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gdrm_disp1_reg_range[i].reg_base + j,
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readl(gdrm_disp1_base[i] + j),
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readl(gdrm_disp1_base[i] + j + 0x4),
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readl(gdrm_disp1_base[i] + j + 0x8),
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readl(gdrm_disp1_base[i] + j + 0xc));
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}
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for (i = 0; i < ARRAY_SIZE(gdrm_disp2_reg_range); i++) {
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if (gdrm_disp2_base[i] == NULL)
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continue;
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for (j = gdrm_disp2_reg_range[i].offset[0];
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j < gdrm_disp2_reg_range[i].offset[0] +
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gdrm_disp2_reg_range[i].length[0];
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j += 16)
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DRM_INFO("%8s 0x%08lX: %08X %08X %08X %08X\n",
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gdrm_disp2_reg_range[i].name,
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gdrm_disp2_reg_range[i].reg_base + j,
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readl(gdrm_disp2_base[i] + j),
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readl(gdrm_disp2_base[i] + j + 0x4),
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readl(gdrm_disp2_base[i] + j + 0x8),
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readl(gdrm_disp2_base[i] + j + 0xc));
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for (j = gdrm_disp2_reg_range[i].offset[1];
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j < gdrm_disp2_reg_range[i].offset[1] +
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gdrm_disp2_reg_range[i].length[1];
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j += 16)
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DRM_INFO("%8s 0x%08lX: %08X %08X %08X %08X\n",
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gdrm_disp2_reg_range[i].name,
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gdrm_disp2_reg_range[i].reg_base + j,
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readl(gdrm_disp2_base[i] + j),
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readl(gdrm_disp2_base[i] + j + 0x4),
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readl(gdrm_disp2_base[i] + j + 0x8),
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readl(gdrm_disp2_base[i] + j + 0xc));
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}
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} else if (strncmp(opt, "hdmi:", 5) == 0) {
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} else if (strncmp(opt, "alpha", 5) == 0) {
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if (dbgfs_alpha) {
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DRM_INFO("set src alpha to src alpha\n");
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dbgfs_alpha = false;
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} else {
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DRM_INFO("set src alpha to ONE\n");
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dbgfs_alpha = true;
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}
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} else if (strncmp(opt, "r:", 2) == 0) {
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char *p = (char *)opt + 2;
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unsigned long addr;
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if (kstrtoul(p, 16, &addr) != 0)
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goto error;
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mtk_read_reg(addr);
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} else if (strncmp(opt, "w:", 2) == 0) {
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char *p = (char *)opt + 2;
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char *np;
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unsigned long addr, val;
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np = strsep(&p, "=");
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if (kstrtoul(np, 16, &addr) != 0)
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goto error;
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if (p == NULL)
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goto error;
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np = strsep(&p, "=");
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if (kstrtoul(np, 16, &val) != 0)
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goto error;
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mtk_write_reg(addr, val);
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} else {
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goto error;
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}
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return;
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error:
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DRM_ERROR("Parse command error!\n\n%s", STR_HELP);
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}
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static void process_dbg_cmd(char *cmd)
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{
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char *tok;
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while ((tok = strsep(&cmd, " ")) != NULL)
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process_dbg_opt(tok);
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}
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/* ------------------------------------------------------------------------- */
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/* Debug FileSystem Routines */
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/* ------------------------------------------------------------------------- */
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static int debug_open(struct inode *inode, struct file *file)
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{
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file->private_data = inode->i_private;
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return 0;
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}
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static char dis_cmd_buf[512];
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static ssize_t debug_read(struct file *file, char __user *ubuf, size_t count,
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loff_t *ppos)
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{
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if (strncmp(dis_cmd_buf, "regr:", 5) == 0) {
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char read_buf[512] = {0};
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char *p = (char *)dis_cmd_buf + 5;
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unsigned long addr;
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int ret;
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u64 i;
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if (kstrtoul(p, 16, &addr) != 0)
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return 0;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp1_reg_range); i++) {
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if (addr >= gdrm_disp1_reg_range[i].reg_base &&
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addr < gdrm_disp1_reg_range[i].reg_base +
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0x1000UL) {
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ret = sprintf(
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read_buf,
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"%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp1_reg_range[i].name, addr,
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readl(gdrm_disp1_base[i] + addr -
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gdrm_disp1_reg_range[i]
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.reg_base));
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if (ret <= 0L)
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DRM_INFO("autoregr fail\n");
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break;
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}
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}
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for (i = 0; i < ARRAY_SIZE(gdrm_disp2_reg_range); i++) {
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if (addr >= gdrm_disp2_reg_range[i].reg_base &&
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addr < gdrm_disp2_reg_range[i].reg_base +
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0x1000UL) {
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ret = sprintf(
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read_buf,
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"%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp2_reg_range[i].name, addr,
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readl(gdrm_disp2_base[i] + addr -
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gdrm_disp2_reg_range[i]
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.reg_base));
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if (ret <= 0L)
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DRM_INFO("autoregr fail\n");
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break;
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}
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}
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return simple_read_from_buffer(ubuf, count, ppos, read_buf,
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strlen(read_buf));
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} else if (strncmp(dis_cmd_buf, "autoregr:", 9) == 0) {
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char read_buf[512] = {0};
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char read_buf2[512] = {0};
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char *p = (char *)dis_cmd_buf + 9;
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unsigned long addr;
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unsigned long addr2;
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int ret;
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u64 i;
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if (kstrtoul(p, 16, &addr) != 0)
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return 0;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp1_reg_range); i++) {
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if (addr >= gdrm_disp1_reg_range[i].reg_base &&
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addr < gdrm_disp1_reg_range[i].reg_base +
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0x1000UL) {
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ret = sprintf(
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read_buf,
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"%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp1_reg_range[i].name, addr,
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readl(gdrm_disp1_base[i] + addr -
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gdrm_disp1_reg_range[i]
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.reg_base));
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if (ret <= 0L)
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DRM_INFO("autoregr fail\n");
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break;
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}
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}
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addr2 = addr + 0x1000ULL;
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for (i = 0; i < ARRAY_SIZE(gdrm_disp2_reg_range); i++) {
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if (addr2 >= gdrm_disp2_reg_range[i].reg_base &&
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addr2 < gdrm_disp2_reg_range[i].reg_base +
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0x1000UL) {
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ret = sprintf(
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read_buf2,
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"%8s Read register 0x%08lX: 0x%08X\n",
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gdrm_disp2_reg_range[i].name, addr2,
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readl(gdrm_disp2_base[i] + addr2 -
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gdrm_disp2_reg_range[i]
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.reg_base));
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if (ret <= 0L)
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DRM_INFO("autoregr fail\n");
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break;
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}
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}
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p = strncat(read_buf, read_buf2,
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(sizeof(read_buf) - strlen(read_buf) - 1));
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if (p == NULL)
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DRM_INFO("autoregr strcat fail\n");
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return simple_read_from_buffer(ubuf, count, ppos, read_buf,
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strlen(read_buf));
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} else {
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return simple_read_from_buffer(ubuf, count, ppos, STR_HELP,
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||
|
strlen(STR_HELP));
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static ssize_t debug_write(struct file *file, const char __user *ubuf,
|
||
|
size_t count, loff_t *ppos)
|
||
|
{
|
||
|
const u64 debug_bufmax = sizeof(dis_cmd_buf) - 1ULL;
|
||
|
ssize_t ret;
|
||
|
|
||
|
ret = (ssize_t)count;
|
||
|
|
||
|
if (count > debug_bufmax)
|
||
|
count = debug_bufmax;
|
||
|
|
||
|
if (copy_from_user(&dis_cmd_buf, ubuf, count) != 0ULL)
|
||
|
return -EFAULT;
|
||
|
|
||
|
dis_cmd_buf[count] = '\0';
|
||
|
|
||
|
process_dbg_cmd(dis_cmd_buf);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
#if S_ENABLED(CONFIG_DEBUG_FS)
|
||
|
static struct dentry *mtkdrm_dbgfs;
|
||
|
#endif
|
||
|
|
||
|
#if IS_ENABLED(CONFIG_PROC_FS)
|
||
|
static struct proc_dir_entry *mtkdrm_dbgfs;
|
||
|
#endif
|
||
|
|
||
|
static const struct file_operations debug_fops = {
|
||
|
.read = debug_read, .write = debug_write, .open = debug_open,
|
||
|
};
|
||
|
|
||
|
bool force_alpha(void)
|
||
|
{
|
||
|
return dbgfs_alpha;
|
||
|
}
|
||
|
|
||
|
void mtk_drm_debugfs_init(struct drm_device *dev, struct mtk_drm_private *priv)
|
||
|
{
|
||
|
void __iomem *mutex_regs;
|
||
|
unsigned long mutex_phys;
|
||
|
struct device_node *np;
|
||
|
struct resource res;
|
||
|
int i;
|
||
|
enum mtk_ddp_comp_id comp_id;
|
||
|
const struct mtk_crtc_path_data *main_path_data;
|
||
|
const struct mtk_crtc_path_data *ext_path_data;
|
||
|
int ret;
|
||
|
|
||
|
DRM_DEBUG_DRIVER("%s\n", __func__);
|
||
|
#if IS_ENABLED(CONFIG_DEBUG_FS)
|
||
|
mtkdrm_dbgfs = debugfs_create_file("mtkdrm", 0644, NULL, (void *)0,
|
||
|
&debug_fops);
|
||
|
#endif
|
||
|
#if IS_ENABLED(CONFIG_PROC_FS)
|
||
|
mtkdrm_dbgfs = proc_create("mtkdrm", S_IFREG | 0640, NULL,
|
||
|
&debug_fops);
|
||
|
if (!mtkdrm_dbgfs) {
|
||
|
pr_info("[%s %d]failed to create mtkdrm in /proc\n",
|
||
|
__func__, __LINE__);
|
||
|
goto out;
|
||
|
}
|
||
|
#endif
|
||
|
/* TODO: The debugfs_init would be different in latest kernel version,
|
||
|
* so we will refine the debugfs with multiple path in latest verion.
|
||
|
*/
|
||
|
main_path_data = priv->data->main_path_data;
|
||
|
for (i = 0; i < priv->data->main_path_data->path_len[DDP_MAJOR][0] - 1;
|
||
|
i++) {
|
||
|
comp_id = main_path_data->path[DDP_MAJOR][0][i];
|
||
|
np = priv->comp_node[comp_id];
|
||
|
if (!priv->ddp_comp[comp_id])
|
||
|
continue;
|
||
|
gdrm_disp1_base[i] = priv->ddp_comp[comp_id]->regs;
|
||
|
|
||
|
ret = of_address_to_resource(np, 0, &res);
|
||
|
if (ret < 0)
|
||
|
DRM_INFO("comp_node[%d] map address fail\n", i);
|
||
|
gdrm_disp1_reg_range[i].reg_base = res.start;
|
||
|
}
|
||
|
|
||
|
gdrm_disp1_base[i] = priv->config_regs;
|
||
|
gdrm_disp1_reg_range[i++].reg_base = 0x14000000;
|
||
|
mutex_regs = of_iomap(priv->mutex_node, 0);
|
||
|
ret = of_address_to_resource(priv->mutex_node, 0, &res);
|
||
|
if (ret < 0)
|
||
|
DRM_INFO("mutex_node map address fail\n");
|
||
|
|
||
|
mutex_phys = res.start;
|
||
|
gdrm_disp1_base[i] = mutex_regs;
|
||
|
gdrm_disp1_reg_range[i++].reg_base = mutex_phys;
|
||
|
|
||
|
/* TODO: The debugfs_init would be different in latest kernel version,
|
||
|
* so we will refine the debugfs with multiple path in latest verion.
|
||
|
*/
|
||
|
ext_path_data = priv->data->ext_path_data;
|
||
|
if (ext_path_data) {
|
||
|
for (i = 0; i < ext_path_data->path_len[DDP_MAJOR][0] - 1;
|
||
|
i++) {
|
||
|
comp_id = ext_path_data->path[DDP_MAJOR][0][i];
|
||
|
np = priv->comp_node[comp_id];
|
||
|
if (!priv->ddp_comp[comp_id])
|
||
|
continue;
|
||
|
gdrm_disp2_base[i] = of_iomap(np, 0);
|
||
|
ret = of_address_to_resource(np, 0, &res);
|
||
|
if (ret < 0)
|
||
|
DRM_INFO("comp_node[%d] map address fail\n", i);
|
||
|
gdrm_disp2_reg_range[i].reg_base = res.start;
|
||
|
}
|
||
|
gdrm_disp2_base[i] = priv->config_regs;
|
||
|
gdrm_disp2_reg_range[i++].reg_base = 0x14000000;
|
||
|
gdrm_disp2_base[i] = mutex_regs;
|
||
|
gdrm_disp2_reg_range[i].reg_base = mutex_phys;
|
||
|
}
|
||
|
out:
|
||
|
DRM_DEBUG_DRIVER("%s..done\n", __func__);
|
||
|
}
|
||
|
|
||
|
void mtk_drm_debugfs_deinit(void)
|
||
|
{
|
||
|
#if IS_ENABLED(CONFIG_DEBUG_FS)
|
||
|
debugfs_remove(mtkdrm_dbgfs);
|
||
|
#endif
|
||
|
#if IS_ENABLED(CONFIG_PROC_FS)
|
||
|
if (mtkdrm_dbgfs) {
|
||
|
proc_remove(mtkdrm_dbgfs);
|
||
|
mtkdrm_dbgfs = NULL;
|
||
|
}
|
||
|
#endif
|
||
|
}
|