48 lines
1.1 KiB
Plaintext
48 lines
1.1 KiB
Plaintext
|
/*
|
||
|
|
* Copyright (C) 2013 Altera Corporation <www.altera.com>
|
||
|
|
*
|
||
|
|
* This program is free software; you can redistribute it and/or modify it
|
||
|
|
* under the terms and conditions of the GNU General Public License,
|
||
|
|
* version 2, as published by the Free Software Foundation.
|
||
|
|
*
|
||
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||
|
|
* more details.
|
||
|
|
*
|
||
|
|
* You should have received a copy of the GNU General Public License along with
|
||
|
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||
|
|
*/
|
||
|
|
|
||
|
|
/dts-v1/;
|
||
|
|
/* First 4KB has trampoline code for secondary cores. */
|
||
|
|
/memreserve/ 0x00000000 0x0001000;
|
||
|
|
#include "socfpga.dtsi"
|
||
|
|
|
||
|
|
/ {
|
||
|
|
soc {
|
||
|
|
clkmgr@ffd04000 {
|
||
|
|
clocks {
|
||
|
|
osc1 {
|
||
|
|
clock-frequency = <25000000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc0: dwmmc0@ff704000 {
|
||
|
|
broken-cd;
|
||
|
|
bus-width = <4>;
|
||
|
|
cap-mmc-highspeed;
|
||
|
|
cap-sd-highspeed;
|
||
|
|
};
|
||
|
|
|
||
|
|
sysmgr@ffd08000 {
|
||
|
|
cpu1-start-addr = <0xffd080c4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&watchdog0 {
|
||
|
|
status = "okay";
|
||
|
|
};
|