80 lines
3.3 KiB
C
80 lines
3.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include "cmdq_subsys_common.h"
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#include "mdp_cmdq_helper_ext.h"
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static struct cmdq_subsys_dts_name subsys[] = {
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[CMDQ_SUBSYS_G3D_CONFIG_BASE] = {
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.group = "MFG", .name = "g3d_config_base"},
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[CMDQ_SUBSYS_MMSYS_CONFIG] = {
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.group = "MMSYS", .name = "mmsys_config_base"},
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[CMDQ_SUBSYS_DISP_DITHER] = {
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.group = "MMSYS", .name = "disp_dither_base"},
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[CMDQ_SUBSYS_NA] = {.group = "MMSYS", .name = "mm_na_base"},
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[CMDQ_SUBSYS_IMGSYS] = {.group = "CAM", .name = "imgsys_base"},
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[CMDQ_SUBSYS_VDEC_GCON] = {.group = "VDEC", .name = "vdec_gcon_base"},
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[CMDQ_SUBSYS_VENC_GCON] = {.group = "VENC", .name = "venc_gcon_base"},
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[CMDQ_SUBSYS_CONN_PERIPHERALS] = {
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.group = "PERISYS", .name = "conn_peri_base"},
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[CMDQ_SUBSYS_TOPCKGEN] = {
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.group = "TOP_AO_3", .name = "topckgen_base"},
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[CMDQ_SUBSYS_KP] = {.group = "INFRA_AO", .name = "kp_base"},
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[CMDQ_SUBSYS_SCP_SRAM] = {
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.group = "INFRA_AO", .name = "scp_sram_base"},
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[CMDQ_SUBSYS_INFRA_NA3] = {.group = "NA", .name = "infra_na3_base"},
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[CMDQ_SUBSYS_INFRA_NA4] = {.group = "NA", .name = "infra_na4_base"},
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[CMDQ_SUBSYS_SCP] = {.group = "SCP", .name = "scp_base"},
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[CMDQ_SUBSYS_MCUCFG] = {.group = "INFRASYS", .name = "mcucfg_base"},
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[CMDQ_SUBSYS_GCPU] = {.group = "INFRASYS", .name = "gcpu_base"},
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[CMDQ_SUBSYS_USB0] = {.group = "PERISYS", .name = "usb0_base"},
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[CMDQ_SUBSYS_USB_SIF] = {.group = "PERISYS", .name = "usb_sif_base"},
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[CMDQ_SUBSYS_AUDIO] = {.group = "PERISYS", .name = "audio_base"},
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[CMDQ_SUBSYS_MSDC0] = {.group = "PERISYS", .name = "msdc0_base"},
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[CMDQ_SUBSYS_MSDC1] = {.group = "PERISYS", .name = "msdc1_base"},
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[CMDQ_SUBSYS_MSDC2] = {.group = "PERISYS", .name = "msdc2_base"},
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[CMDQ_SUBSYS_MSDC3] = {.group = "PERISYS", .name = "msdc3_base"},
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[CMDQ_SUBSYS_AP_DMA] = {.group = "INFRASYS", .name = "ap_dma_base"},
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[CMDQ_SUBSYS_GCE] = {.group = "GCE", .name = "gce_base"},
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[CMDQ_SUBSYS_VDEC] = {.group = "VDEC", .name = "vdec_base"},
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[CMDQ_SUBSYS_VDEC1] = {.group = "VDEC", .name = "vdec1_base"},
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[CMDQ_SUBSYS_VDEC2] = {.group = "VDEC", .name = "vdec2_base"},
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[CMDQ_SUBSYS_VDEC3] = {.group = "VDEC", .name = "vdec3_base"},
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[CMDQ_SUBSYS_CAMSYS] = {.group = "CAMSYS", .name = "camsys_base"},
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[CMDQ_SUBSYS_CAMSYS1] = {.group = "CAMSYS", .name = "camsys1_base"},
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[CMDQ_SUBSYS_CAMSYS2] = {.group = "CAMSYS", .name = "camsys2_base"},
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[CMDQ_SUBSYS_CAMSYS3] = {.group = "CAMSYS", .name = "camsys3_base"},
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[CMDQ_SUBSYS_IMGSYS1] = {.group = "IMGSYS", .name = "imgsys1_base"},
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[CMDQ_SUBSYS_SMI_LAB1] = {
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.group = "SMI_LAB1", .name = "smi_larb1_base"},
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/* Special subsys */
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[CMDQ_SUBSYS_PWM_SW] = {.group = "SPECIAL", .name = "pwm_sw_base"},
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[CMDQ_SUBSYS_PWM1_SW] = {.group = "SPECIAL", .name = "pwm1_sw_base"},
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[CMDQ_SUBSYS_DIP_A0_SW] = {
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.group = "SPECIAL", .name = "dip_a0_sw_base"},
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[CMDQ_SUBSYS_MIPITX0] = {.group = "SPECIAL", .name = "mipitx0_base"},
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[CMDQ_SUBSYS_MIPITX1] = {.group = "SPECIAL", .name = "mipitx1_base"},
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[CMDQ_SUBSYS_VENC] = {.group = "SPECIAL", .name = "venc_base"},
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[CMDQ_SUBSYS_IMGSYS2] = {.group = "SPECIAL", .name = "imgsys2_base"},
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[CMDQ_SUBSYS_IPESYS] = {.group = "SPECIAL", .name = "ipesys_base"},
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[CMDQ_SUBSYS_DPE] = {.group = "SPECIAL", .name = "dpe_base"},
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};
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struct cmdq_subsys_dts_name *cmdq_subsys_get_dts(void)
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{
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return subsys;
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}
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u32 cmdq_subsys_get_size(void)
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{
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return ARRAY_SIZE(subsys);
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}
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