424 lines
12 KiB
C
424 lines
12 KiB
C
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/*
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* arch/arm/mach-ep93xx/ts72xx.c
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* Technologic Systems TS72xx SBC support.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/mmc_spi.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_data/spi-ep93xx.h>
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#include <mach/gpio-ep93xx.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/gpio-ep93xx.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include "soc.h"
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#include "ts72xx.h"
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/*************************************************************************
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* IO map
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*************************************************************************/
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static struct map_desc ts72xx_io_desc[] __initdata = {
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{
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.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
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.length = TS72XX_MODEL_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
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.length = TS72XX_OPTIONS_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
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.length = TS72XX_OPTIONS2_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
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.length = TS72XX_CPLDVER_SIZE,
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.type = MT_DEVICE,
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}
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};
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static void __init ts72xx_map_io(void)
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{
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ep93xx_map_io();
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iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
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}
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/*************************************************************************
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* NAND flash
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*************************************************************************/
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#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
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#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
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static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
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int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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if (ctrl & NAND_CTRL_CHANGE) {
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void __iomem *addr = chip->IO_ADDR_R;
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unsigned char bits;
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addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
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bits = __raw_readb(addr) & ~0x07;
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bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
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bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
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bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
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__raw_writeb(bits, addr);
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}
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if (cmd != NAND_CMD_NONE)
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__raw_writeb(cmd, chip->IO_ADDR_W);
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}
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static int ts72xx_nand_device_ready(struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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void __iomem *addr = chip->IO_ADDR_R;
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addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
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return !!(__raw_readb(addr) & 0x20);
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}
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#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
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#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
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static struct mtd_partition ts72xx_nand_parts[] = {
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{
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.name = "TS-BOOTROM",
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.offset = 0,
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.size = TS72XX_BOOTROM_PART_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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.name = "Linux",
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.offset = MTDPART_OFS_RETAIN,
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.size = TS72XX_REDBOOT_PART_SIZE,
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/* leave so much for last partition */
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}, {
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.name = "RedBoot",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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};
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static struct platform_nand_data ts72xx_nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.chip_delay = 15,
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},
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.ctrl = {
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.cmd_ctrl = ts72xx_nand_hwcontrol,
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.dev_ready = ts72xx_nand_device_ready,
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},
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};
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static struct resource ts72xx_nand_resource[] = {
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{
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.start = 0, /* filled in later */
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.end = 0, /* filled in later */
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ts72xx_nand_flash = {
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.name = "gen_nand",
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.id = -1,
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.dev.platform_data = &ts72xx_nand_data,
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.resource = ts72xx_nand_resource,
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.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
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};
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void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
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resource_size_t start)
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{
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/*
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* TS7200 has NOR flash all other TS72xx board have NAND flash.
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*/
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if (board_is_ts7200()) {
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ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
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} else {
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ts72xx_nand_resource[0].start = start;
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ts72xx_nand_resource[0].end = start + SZ_16M - 1;
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ts72xx_nand_data.chip.partitions = parts;
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ts72xx_nand_data.chip.nr_partitions = n;
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platform_device_register(&ts72xx_nand_flash);
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}
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}
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/*************************************************************************
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* RTC M48T86
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*************************************************************************/
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#define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
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#define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
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static struct resource ts72xx_rtc_resources[] = {
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DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
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DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
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};
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static struct platform_device ts72xx_rtc_device = {
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.name = "rtc-m48t86",
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.id = -1,
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.resource = ts72xx_rtc_resources,
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.num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
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};
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/*************************************************************************
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* Watchdog (in CPLD)
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*************************************************************************/
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#define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
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#define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
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static struct resource ts72xx_wdt_resources[] = {
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DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
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DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
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};
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static struct platform_device ts72xx_wdt_device = {
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.name = "ts72xx-wdt",
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.id = -1,
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.resource = ts72xx_wdt_resources,
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.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
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};
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/*************************************************************************
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* ETH
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*************************************************************************/
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static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
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.phy_id = 1,
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};
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/*************************************************************************
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* SPI SD/MMC host
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*************************************************************************/
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#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
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#define BK3_EN_SDCARD_PWR 0x0
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#define BK3_DIS_SDCARD_PWR 0x0C
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static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
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{
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void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
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if (!pwr_sd) {
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pr_err("Failed to enable SD card power!");
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return;
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}
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pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
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!!vdd ? "ON" : "OFF", vdd);
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if (!!vdd)
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__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
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else
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__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
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iounmap(pwr_sd);
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}
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static struct mmc_spi_platform_data bk3_spi_mmc_data = {
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.detect_delay = 500,
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.powerup_msecs = 100,
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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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.caps = MMC_CAP_NONREMOVABLE,
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.setpower = bk3_mmc_spi_setpower,
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};
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/*************************************************************************
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* SPI Bus - SD card access
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*************************************************************************/
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static struct spi_board_info bk3_spi_board_info[] __initdata = {
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{
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.modalias = "mmc_spi",
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.platform_data = &bk3_spi_mmc_data,
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.max_speed_hz = 7.4E6,
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.bus_num = 0,
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.chip_select = 0,
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.mode = SPI_MODE_0,
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},
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};
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/*
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* This is a stub -> the FGPIO[3] pin is not connected on the schematic
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* The all work is performed automatically by !SPI_FRAME (SFRM1) and
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* goes through CPLD
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*/
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static int bk3_spi_chipselects[] __initdata = {
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EP93XX_GPIO_LINE_F(3),
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};
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static struct ep93xx_spi_info bk3_spi_master __initdata = {
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.chipselect = bk3_spi_chipselects,
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.num_chipselect = ARRAY_SIZE(bk3_spi_chipselects),
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.use_dma = 1,
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};
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/*************************************************************************
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* TS72XX support code
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*************************************************************************/
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#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
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/* Relative to EP93XX_CS1_PHYS_BASE */
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#define TS73XX_FPGA_LOADER_BASE 0x03c00000
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static struct resource ts73xx_fpga_resources[] = {
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{
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.start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
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.end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ts73xx_fpga_device = {
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.name = "ts73xx-fpga-mgr",
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.id = -1,
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.resource = ts73xx_fpga_resources,
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.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
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};
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#endif
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/*************************************************************************
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* SPI Bus
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*************************************************************************/
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static struct spi_board_info ts72xx_spi_devices[] __initdata = {
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{
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.modalias = "tmp122",
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.max_speed_hz = 2 * 1000 * 1000,
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.bus_num = 0,
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.chip_select = 0,
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},
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};
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static int ts72xx_spi_chipselects[] __initdata = {
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EP93XX_GPIO_LINE_F(2), /* DIO_17 */
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};
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static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
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.chipselect = ts72xx_spi_chipselects,
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.num_chipselect = ARRAY_SIZE(ts72xx_spi_chipselects),
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};
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static void __init ts72xx_init_machine(void)
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{
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ep93xx_init_devices();
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ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
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is_ts9420_installed() ?
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EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
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platform_device_register(&ts72xx_rtc_device);
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platform_device_register(&ts72xx_wdt_device);
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ep93xx_register_eth(&ts72xx_eth_data, 1);
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#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
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if (board_is_ts7300())
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platform_device_register(&ts73xx_fpga_device);
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#endif
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ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
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ARRAY_SIZE(ts72xx_spi_devices));
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}
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MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
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/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
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.atag_offset = 0x100,
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.map_io = ts72xx_map_io,
|
||
|
|
.init_irq = ep93xx_init_irq,
|
||
|
|
.init_time = ep93xx_timer_init,
|
||
|
|
.init_machine = ts72xx_init_machine,
|
||
|
|
.init_late = ep93xx_init_late,
|
||
|
|
.restart = ep93xx_restart,
|
||
|
|
MACHINE_END
|
||
|
|
|
||
|
|
/*************************************************************************
|
||
|
|
* EP93xx I2S audio peripheral handling
|
||
|
|
*************************************************************************/
|
||
|
|
static struct resource ep93xx_i2s_resource[] = {
|
||
|
|
DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
|
||
|
|
DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device ep93xx_i2s_device = {
|
||
|
|
.name = "ep93xx-spilink-i2s",
|
||
|
|
.id = -1,
|
||
|
|
.num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
|
||
|
|
.resource = ep93xx_i2s_resource,
|
||
|
|
};
|
||
|
|
|
||
|
|
/*************************************************************************
|
||
|
|
* BK3 support code
|
||
|
|
*************************************************************************/
|
||
|
|
static struct mtd_partition bk3_nand_parts[] = {
|
||
|
|
{
|
||
|
|
.name = "System",
|
||
|
|
.offset = 0x00000000,
|
||
|
|
.size = 0x01e00000,
|
||
|
|
}, {
|
||
|
|
.name = "Data",
|
||
|
|
.offset = 0x01e00000,
|
||
|
|
.size = 0x05f20000
|
||
|
|
}, {
|
||
|
|
.name = "RedBoot",
|
||
|
|
.offset = 0x07d20000,
|
||
|
|
.size = 0x002e0000,
|
||
|
|
.mask_flags = MTD_WRITEABLE, /* force RO */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static void __init bk3_init_machine(void)
|
||
|
|
{
|
||
|
|
ep93xx_init_devices();
|
||
|
|
|
||
|
|
ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
|
||
|
|
EP93XX_CS6_PHYS_BASE);
|
||
|
|
|
||
|
|
ep93xx_register_eth(&ts72xx_eth_data, 1);
|
||
|
|
|
||
|
|
ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
|
||
|
|
ARRAY_SIZE(bk3_spi_board_info));
|
||
|
|
|
||
|
|
/* Configure ep93xx's I2S to use AC97 pins */
|
||
|
|
ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
|
||
|
|
platform_device_register(&ep93xx_i2s_device);
|
||
|
|
}
|
||
|
|
|
||
|
|
MACHINE_START(BK3, "Liebherr controller BK3.1")
|
||
|
|
/* Maintainer: Lukasz Majewski <lukma@denx.de> */
|
||
|
|
.atag_offset = 0x100,
|
||
|
|
.map_io = ts72xx_map_io,
|
||
|
|
.init_irq = ep93xx_init_irq,
|
||
|
|
.init_time = ep93xx_timer_init,
|
||
|
|
.init_machine = bk3_init_machine,
|
||
|
|
.init_late = ep93xx_init_late,
|
||
|
|
.restart = ep93xx_restart,
|
||
|
|
MACHINE_END
|