283 lines
6.9 KiB
C
283 lines
6.9 KiB
C
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/*
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* MMU context allocation for 64-bit kernels.
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*
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* Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/pkeys.h>
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#include <linux/spinlock.h>
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#include <linux/idr.h>
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#include <linux/export.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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static DEFINE_IDA(mmu_context_ida);
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static int alloc_context_id(int min_id, int max_id)
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{
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return ida_alloc_range(&mmu_context_ida, min_id, max_id, GFP_KERNEL);
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}
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void hash__reserve_context_id(int id)
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{
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int result = ida_alloc_range(&mmu_context_ida, id, id, GFP_KERNEL);
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WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result);
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}
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int hash__alloc_context_id(void)
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{
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unsigned long max;
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if (mmu_has_feature(MMU_FTR_68_BIT_VA))
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max = MAX_USER_CONTEXT;
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else
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max = MAX_USER_CONTEXT_65BIT_VA;
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return alloc_context_id(MIN_USER_CONTEXT, max);
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}
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EXPORT_SYMBOL_GPL(hash__alloc_context_id);
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static int realloc_context_ids(mm_context_t *ctx)
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{
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int i, id;
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/*
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* id 0 (aka. ctx->id) is special, we always allocate a new one, even if
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* there wasn't one allocated previously (which happens in the exec
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* case where ctx is newly allocated).
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*
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* We have to be a bit careful here. We must keep the existing ids in
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* the array, so that we can test if they're non-zero to decide if we
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* need to allocate a new one. However in case of error we must free the
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* ids we've allocated but *not* any of the existing ones (or risk a
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* UAF). That's why we decrement i at the start of the error handling
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* loop, to skip the id that we just tested but couldn't reallocate.
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*/
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for (i = 0; i < ARRAY_SIZE(ctx->extended_id); i++) {
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if (i == 0 || ctx->extended_id[i]) {
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id = hash__alloc_context_id();
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if (id < 0)
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goto error;
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ctx->extended_id[i] = id;
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}
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}
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/* The caller expects us to return id */
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return ctx->id;
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error:
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for (i--; i >= 0; i--) {
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if (ctx->extended_id[i])
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ida_free(&mmu_context_ida, ctx->extended_id[i]);
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}
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return id;
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}
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static int hash__init_new_context(struct mm_struct *mm)
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{
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int index;
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/*
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* The old code would re-promote on fork, we don't do that when using
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* slices as it could cause problem promoting slices that have been
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* forced down to 4K.
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*
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* For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check
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* explicitly against context.id == 0. This ensures that we properly
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* initialize context slice details for newly allocated mm's (which will
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* have id == 0) and don't alter context slice inherited via fork (which
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* will have id != 0).
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*
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* We should not be calling init_new_context() on init_mm. Hence a
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* check against 0 is OK.
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*/
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if (mm->context.id == 0)
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slice_init_new_context_exec(mm);
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index = realloc_context_ids(&mm->context);
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if (index < 0)
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return index;
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subpage_prot_init_new_context(mm);
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pkey_mm_init(mm);
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return index;
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}
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static int radix__init_new_context(struct mm_struct *mm)
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{
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unsigned long rts_field;
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int index, max_id;
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max_id = (1 << mmu_pid_bits) - 1;
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index = alloc_context_id(mmu_base_pid, max_id);
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if (index < 0)
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return index;
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/*
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* set the process table entry,
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*/
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rts_field = radix__get_tree_size();
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process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE);
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/*
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* Order the above store with subsequent update of the PID
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* register (at which point HW can start loading/caching
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* the entry) and the corresponding load by the MMU from
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* the L2 cache.
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*/
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asm volatile("ptesync;isync" : : : "memory");
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mm->context.npu_context = NULL;
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return index;
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}
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int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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int index;
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if (radix_enabled())
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index = radix__init_new_context(mm);
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else
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index = hash__init_new_context(mm);
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if (index < 0)
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return index;
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mm->context.id = index;
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mm->context.pte_frag = NULL;
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mm->context.pmd_frag = NULL;
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#ifdef CONFIG_SPAPR_TCE_IOMMU
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mm_iommu_init(mm);
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#endif
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atomic_set(&mm->context.active_cpus, 0);
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atomic_set(&mm->context.copros, 0);
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return 0;
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}
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void __destroy_context(int context_id)
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{
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ida_free(&mmu_context_ida, context_id);
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}
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EXPORT_SYMBOL_GPL(__destroy_context);
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static void destroy_contexts(mm_context_t *ctx)
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{
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int index, context_id;
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for (index = 0; index < ARRAY_SIZE(ctx->extended_id); index++) {
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context_id = ctx->extended_id[index];
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if (context_id)
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ida_free(&mmu_context_ida, context_id);
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}
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}
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static void pte_frag_destroy(void *pte_frag)
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{
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int count;
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struct page *page;
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page = virt_to_page(pte_frag);
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/* drop all the pending references */
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count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
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/* We allow PTE_FRAG_NR fragments from a PTE page */
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if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
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pgtable_page_dtor(page);
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__free_page(page);
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}
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}
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static void pmd_frag_destroy(void *pmd_frag)
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{
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int count;
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struct page *page;
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page = virt_to_page(pmd_frag);
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/* drop all the pending references */
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count = ((unsigned long)pmd_frag & ~PAGE_MASK) >> PMD_FRAG_SIZE_SHIFT;
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/* We allow PTE_FRAG_NR fragments from a PTE page */
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if (atomic_sub_and_test(PMD_FRAG_NR - count, &page->pt_frag_refcount)) {
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pgtable_pmd_page_dtor(page);
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__free_page(page);
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}
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}
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static void destroy_pagetable_cache(struct mm_struct *mm)
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{
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void *frag;
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frag = mm->context.pte_frag;
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if (frag)
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pte_frag_destroy(frag);
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frag = mm->context.pmd_frag;
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if (frag)
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pmd_frag_destroy(frag);
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return;
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}
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void destroy_context(struct mm_struct *mm)
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{
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#ifdef CONFIG_SPAPR_TCE_IOMMU
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WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));
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#endif
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if (radix_enabled())
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WARN_ON(process_tb[mm->context.id].prtb0 != 0);
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else
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subpage_prot_free(mm);
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destroy_contexts(&mm->context);
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mm->context.id = MMU_NO_CONTEXT;
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}
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void arch_exit_mmap(struct mm_struct *mm)
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{
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destroy_pagetable_cache(mm);
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if (radix_enabled()) {
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/*
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* Radix doesn't have a valid bit in the process table
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* entries. However we know that at least P9 implementation
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* will avoid caching an entry with an invalid RTS field,
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* and 0 is invalid. So this will do.
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*
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* This runs before the "fullmm" tlb flush in exit_mmap,
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* which does a RIC=2 tlbie to clear the process table
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* entry. See the "fullmm" comments in tlb-radix.c.
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*
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* No barrier required here after the store because
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* this process will do the invalidate, which starts with
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* ptesync.
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*/
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process_tb[mm->context.id].prtb0 = 0;
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}
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}
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#ifdef CONFIG_PPC_RADIX_MMU
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void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
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{
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mtspr(SPRN_PID, next->context.id);
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isync();
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}
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#endif
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