126 lines
8.7 KiB
C
126 lines
8.7 KiB
C
|
/* SPDX-License-Identifier: GPL-2.0 */
|
||
|
/*
|
||
|
* Copyright (c) 2019 MediaTek Inc.
|
||
|
*/
|
||
|
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000110, 0xa0a050d8)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000118, 0x000070c3)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000120, 0x40406048)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000128, 0xa0a070d7)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000048, 0x00030027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000080, 0x00000f00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000140, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000144, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x0000015c, 0x82410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000110, 0xa0a050da)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000118, 0x000070c4)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000120, 0x40406049)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000128, 0xa0a070d3)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000048, 0x00030027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000080, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000140, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000144, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x0000015c, 0x82410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000110, 0xa0a050cb)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000118, 0x000070cc)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000120, 0x40406046)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000128, 0xa0a070d6)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000048, 0x00030027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000080, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000140, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000144, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000158, 0x00080868)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000110, 0xa0a050c6)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000118, 0x000070cc)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000120, 0x40406045)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000128, 0xa0a070d5)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000048, 0x00030027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000080, 0x00000f00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000140, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000144, 0x20406188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000110, 0xa0a050d8)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000118, 0x000070c3)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000120, 0x40406048)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000128, 0xa0a070d7)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000048, 0x00008027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000080, 0x00000f00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000140, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000144, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x0000015c, 0x82410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000110, 0xa0a050da)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000118, 0x000070c4)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000120, 0x40406049)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000128, 0xa0a070d3)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000048, 0x00008027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000080, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000140, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000144, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x0000015c, 0x82410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000110, 0xa0a050cb)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000118, 0x000070cc)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000120, 0x40406046)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000128, 0xa0a070d6)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000048, 0x00008027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000080, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000140, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000144, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000158, 0x00080868)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000100, 0x4020524f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000108, 0x4020504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000110, 0xa0a050c6)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000118, 0x000070cc)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000120, 0x40406045)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000128, 0xa0a070d5)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000130, 0xa0a0504f)
|
||
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000138, 0xa0a0504f)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000048, 0x00008027)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000080, 0x00000f00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000088, 0x00000b00)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000140, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000144, 0x20407188)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000158, 0x00080888)
|
||
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
|