250 lines
6.2 KiB
C
250 lines
6.2 KiB
C
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/*
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* Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef __NFIT_TEST_H__
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#define __NFIT_TEST_H__
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#include <linux/acpi.h>
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#include <linux/list.h>
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#include <linux/uuid.h>
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#include <linux/ioport.h>
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#include <linux/spinlock_types.h>
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struct nfit_test_request {
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struct list_head list;
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struct resource res;
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};
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struct nfit_test_resource {
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struct list_head requests;
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struct list_head list;
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struct resource res;
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struct device *dev;
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spinlock_t lock;
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int req_count;
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void *buf;
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};
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#define ND_TRANSLATE_SPA_STATUS_INVALID_SPA 2
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#define NFIT_ARS_INJECT_INVALID 2
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enum err_inj_options {
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ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
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};
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/* nfit commands */
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enum nfit_cmd_num {
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NFIT_CMD_TRANSLATE_SPA = 5,
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NFIT_CMD_ARS_INJECT_SET = 7,
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NFIT_CMD_ARS_INJECT_CLEAR = 8,
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NFIT_CMD_ARS_INJECT_GET = 9,
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};
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struct nd_cmd_translate_spa {
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__u64 spa;
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__u32 status;
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__u8 flags;
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__u8 _reserved[3];
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__u64 translate_length;
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__u32 num_nvdimms;
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struct nd_nvdimm_device {
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__u32 nfit_device_handle;
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__u32 _reserved;
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__u64 dpa;
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} __packed devices[0];
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} __packed;
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struct nd_cmd_ars_err_inj {
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__u64 err_inj_spa_range_base;
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__u64 err_inj_spa_range_length;
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__u8 err_inj_options;
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__u32 status;
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} __packed;
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struct nd_cmd_ars_err_inj_clr {
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__u64 err_inj_clr_spa_range_base;
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__u64 err_inj_clr_spa_range_length;
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__u32 status;
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} __packed;
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struct nd_cmd_ars_err_inj_stat {
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__u32 status;
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__u32 inj_err_rec_count;
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struct nd_error_stat_query_record {
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__u64 err_inj_stat_spa_range_base;
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__u64 err_inj_stat_spa_range_length;
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} __packed record[0];
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} __packed;
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#define ND_INTEL_SMART 1
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#define ND_INTEL_SMART_THRESHOLD 2
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#define ND_INTEL_ENABLE_LSS_STATUS 10
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#define ND_INTEL_FW_GET_INFO 12
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#define ND_INTEL_FW_START_UPDATE 13
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#define ND_INTEL_FW_SEND_DATA 14
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#define ND_INTEL_FW_FINISH_UPDATE 15
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#define ND_INTEL_FW_FINISH_QUERY 16
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#define ND_INTEL_SMART_SET_THRESHOLD 17
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#define ND_INTEL_SMART_INJECT 18
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#define ND_INTEL_SMART_HEALTH_VALID (1 << 0)
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#define ND_INTEL_SMART_SPARES_VALID (1 << 1)
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#define ND_INTEL_SMART_USED_VALID (1 << 2)
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#define ND_INTEL_SMART_MTEMP_VALID (1 << 3)
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#define ND_INTEL_SMART_CTEMP_VALID (1 << 4)
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#define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID (1 << 5)
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#define ND_INTEL_SMART_AIT_STATUS_VALID (1 << 6)
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#define ND_INTEL_SMART_PTEMP_VALID (1 << 7)
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#define ND_INTEL_SMART_ALARM_VALID (1 << 9)
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#define ND_INTEL_SMART_SHUTDOWN_VALID (1 << 10)
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#define ND_INTEL_SMART_VENDOR_VALID (1 << 11)
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#define ND_INTEL_SMART_SPARE_TRIP (1 << 0)
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#define ND_INTEL_SMART_TEMP_TRIP (1 << 1)
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#define ND_INTEL_SMART_CTEMP_TRIP (1 << 2)
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#define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)
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#define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)
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#define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)
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#define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)
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#define ND_INTEL_SMART_INJECT_SPARE (1 << 1)
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#define ND_INTEL_SMART_INJECT_FATAL (1 << 2)
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#define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)
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struct nd_intel_smart {
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__u32 status;
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union {
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struct {
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__u32 flags;
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__u8 reserved0[4];
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__u8 health;
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__u8 spares;
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__u8 life_used;
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__u8 alarm_flags;
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__u16 media_temperature;
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__u16 ctrl_temperature;
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__u32 shutdown_count;
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__u8 ait_status;
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__u16 pmic_temperature;
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__u8 reserved1[8];
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__u8 shutdown_state;
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__u32 vendor_size;
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__u8 vendor_data[92];
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} __packed;
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__u8 data[128];
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};
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} __packed;
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struct nd_intel_smart_threshold {
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__u32 status;
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union {
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struct {
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__u16 alarm_control;
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__u8 spares;
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__u16 media_temperature;
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__u16 ctrl_temperature;
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__u8 reserved[1];
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} __packed;
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__u8 data[8];
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};
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} __packed;
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struct nd_intel_smart_set_threshold {
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__u16 alarm_control;
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__u8 spares;
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__u16 media_temperature;
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__u16 ctrl_temperature;
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__u32 status;
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} __packed;
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struct nd_intel_smart_inject {
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__u64 flags;
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__u8 mtemp_enable;
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__u16 media_temperature;
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__u8 spare_enable;
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__u8 spares;
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__u8 fatal_enable;
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__u8 unsafe_shutdown_enable;
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__u32 status;
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} __packed;
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#define INTEL_FW_STORAGE_SIZE 0x100000
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#define INTEL_FW_MAX_SEND_LEN 0xFFEC
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#define INTEL_FW_QUERY_INTERVAL 250000
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#define INTEL_FW_QUERY_MAX_TIME 3000000
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#define INTEL_FW_FIS_VERSION 0x0105
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#define INTEL_FW_FAKE_VERSION 0xffffffffabcd
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enum intel_fw_update_state {
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FW_STATE_NEW = 0,
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FW_STATE_IN_PROGRESS,
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FW_STATE_VERIFY,
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FW_STATE_UPDATED,
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};
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struct nd_intel_fw_info {
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__u32 status;
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__u32 storage_size;
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__u32 max_send_len;
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__u32 query_interval;
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__u32 max_query_time;
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__u8 update_cap;
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__u8 reserved[3];
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__u32 fis_version;
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__u64 run_version;
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__u64 updated_version;
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} __packed;
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struct nd_intel_fw_start {
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__u32 status;
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__u32 context;
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} __packed;
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/* this one has the output first because the variable input data size */
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struct nd_intel_fw_send_data {
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__u32 context;
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__u32 offset;
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__u32 length;
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__u8 data[0];
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/* this field is not declared due ot variable data from input */
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/* __u32 status; */
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} __packed;
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struct nd_intel_fw_finish_update {
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__u8 ctrl_flags;
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__u8 reserved[3];
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__u32 context;
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__u32 status;
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} __packed;
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struct nd_intel_fw_finish_query {
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__u32 context;
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__u32 status;
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__u64 updated_fw_rev;
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} __packed;
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struct nd_intel_lss {
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__u8 enable;
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__u32 status;
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} __packed;
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typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
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typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
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const guid_t *guid, u64 rev, u64 func,
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union acpi_object *argv4);
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void __iomem *__wrap_ioremap_nocache(resource_size_t offset,
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unsigned long size);
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void __wrap_iounmap(volatile void __iomem *addr);
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void nfit_test_setup(nfit_test_lookup_fn lookup,
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nfit_test_evaluate_dsm_fn evaluate);
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void nfit_test_teardown(void);
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struct nfit_test_resource *get_nfit_res(resource_size_t resource);
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#endif
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