86 lines
1.9 KiB
C
86 lines
1.9 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Owen Chen <owen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6765-clk.h>
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static const struct mtk_gate_regs mipi0a_cg_regs = {
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.set_ofs = 0x80,
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.clr_ofs = 0x80,
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.sta_ofs = 0x80,
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};
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#define GATE_MIPI0A(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &mipi0a_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr_inv, \
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}
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static const struct mtk_gate mipi0a_clks[] __initconst = {
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GATE_MIPI0A(CLK_MIPI0A_CSR_CSI_EN_0A,
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"mipi0a_csr_0a", "f_fseninf_ck", 1),
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};
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static int clk_mt6765_mipi0a_probe(struct platform_device *pdev)
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{
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struct clk_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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clk_data = mtk_alloc_clk_data(CLK_MIPI0A_NR_CLK);
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if (!clk_data)
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return -ENOMEM;
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mtk_clk_register_gates(node, mipi0a_clks,
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ARRAY_SIZE(mipi0a_clks), clk_data);
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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if (r) {
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kfree(clk_data);
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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}
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return r;
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}
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static const struct of_device_id of_match_clk_mt6765_mipi0a[] = {
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{ .compatible = "mediatek,mt6765-mipi0a", },
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{}
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};
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static struct platform_driver clk_mt6765_mipi0a_drv = {
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.probe = clk_mt6765_mipi0a_probe,
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.driver = {
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.name = "clk-mt6765-mipi0a",
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.of_match_table = of_match_clk_mt6765_mipi0a,
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},
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};
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static int __init clk_mt6765_mipi0a_init(void)
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{
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return platform_driver_register(&clk_mt6765_mipi0a_drv);
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}
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static void __exit clk_mt6765_mipi0a_exit(void)
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{
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}
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postcore_initcall(clk_mt6765_mipi0a_init);
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module_exit(clk_mt6765_mipi0a_exit);
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MODULE_LICENSE("GPL");
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