42 lines
1.6 KiB
Plaintext
42 lines
1.6 KiB
Plaintext
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* ARM Vectored Interrupt Controller
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One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
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system for interrupt routing. For multiple controllers they can either be
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nested or have the outputs wire-OR'd together.
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Required properties:
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- compatible : should be one of
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"arm,pl190-vic"
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"arm,pl192-vic"
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- interrupt-controller : Identifies the node as an interrupt controller
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- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
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the VIC has no configuration options for interrupt sources. The cell is a u32
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and defines the interrupt number.
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- reg : The register bank for the VIC.
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Optional properties:
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- interrupts : Interrupt source for parent controllers if the VIC is nested.
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- valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
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represents single interrupt source, starting from source 0 at LSb and ending
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at source 31 at MSb. A bit that is set means that the source is wired and
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clear means otherwise. If unspecified, defaults to all valid.
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- valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be
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configured as wake up source for the system. Order of bits is the same as for
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valid-mask property. A set bit means that this interrupt source can be
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configured as a wake up source for the system. If unspecied, defaults to all
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interrupt sources configurable as wake up sources.
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Example:
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vic0: interrupt-controller@60000 {
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compatible = "arm,pl192-vic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x60000 0x1000>;
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valid-mask = <0xffffff7f>;
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valid-wakeup-mask = <0x0000ff7f>;
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};
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