68 lines
2.1 KiB
Plaintext
68 lines
2.1 KiB
Plaintext
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Microchip PIC32 Interrupt Controller
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====================================
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The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
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It handles all internal and external interrupts. This controller exists outside
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of the CPU and is the arbitrator of all interrupts (including interrupts from
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the CPU itself) before they are presented to the CPU.
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External interrupts have a software configurable edge polarity. Non external
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interrupts have a type and polarity that is determined by the source of the
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interrupt.
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Required properties
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-------------------
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- compatible: Should be "microchip,pic32mzda-evic"
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- reg: Specifies physical base address and size of register range.
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt cells: Specifies the number of cells used to encode an interrupt
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source connected to this controller. The value shall be 2 and interrupt
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descriptor shall have the following format:
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<hw_irq irq_type>
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hw_irq - represents the hardware interrupt number as in the data sheet.
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irq_type - is used to describe the type and polarity of an interrupt. For
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internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
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IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
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IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
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Optional properties
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-------------------
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- microchip,external-irqs: u32 array of external interrupts with software
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polarity configuration. This array corresponds to the bits in the INTCON
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SFR.
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Example
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-------
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evic: interrupt-controller@1f810000 {
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compatible = "microchip,pic32mzda-evic";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1f810000 0x1000>;
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microchip,external-irqs = <3 8 13 18 23>;
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};
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Each device/peripheral must request its interrupt line with the associated type
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and polarity.
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Internal interrupt DTS snippet
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------------------------------
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device@1f800000 {
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...
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interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
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...
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};
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External interrupt DTS snippet
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------------------------------
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device@1f800000 {
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...
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interrupts = <3 IRQ_TYPE_EDGE_RISING>;
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...
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};
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