32 lines
1 KiB
Plaintext
32 lines
1 KiB
Plaintext
|
* Amlogic Meson GXL and GXM USB3 PHY and OTG detection binding
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible: Should be "amlogic,meson-gxl-usb3-phy"
|
||
|
|
- #phys-cells: must be 0 (see phy-bindings.txt in this directory)
|
||
|
|
- reg: The base address and length of the registers
|
||
|
|
- interrupts: the interrupt specifier for the OTG detection
|
||
|
|
- clocks: phandles to the clocks for
|
||
|
|
- the USB3 PHY
|
||
|
|
- and peripheral mode/OTG detection
|
||
|
|
- clock-names: must contain "phy" and "peripheral"
|
||
|
|
- resets: phandle to the reset lines for:
|
||
|
|
- the USB3 PHY and
|
||
|
|
- peripheral mode/OTG detection
|
||
|
|
- reset-names: must contain "phy" and "peripheral"
|
||
|
|
|
||
|
|
Optional properties:
|
||
|
|
- phy-supply: see phy-bindings.txt in this directory
|
||
|
|
|
||
|
|
|
||
|
|
Example:
|
||
|
|
usb3_phy0: phy@78080 {
|
||
|
|
compatible = "amlogic,meson-gxl-usb3-phy";
|
||
|
|
#phy-cells = <0>;
|
||
|
|
reg = <0x0 0x78080 0x0 0x20>;
|
||
|
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
clocks = <&clkc CLKID_USB_OTG>, <&clkc_AO CLKID_AO_CEC_32K>;
|
||
|
|
clock-names = "phy", "peripheral";
|
||
|
|
resets = <&reset RESET_USB_OTG>, <&reset RESET_USB_OTG>;
|
||
|
|
reset-names = "phy", "peripheral";
|
||
|
|
};
|