59 lines
2.8 KiB
Plaintext
59 lines
2.8 KiB
Plaintext
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Spreadtrum ADI controller
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ADI is the abbreviation of Anolog-Digital interface, which is used to access
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analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
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framework for its hardware implementation is alike to SPI bus and its timing
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is compatile to SPI timing.
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ADI controller has 50 channels including 2 software read/write channels and
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48 hardware channels to access analog chip. For 2 software read/write channels,
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users should set ADI registers to access analog chip. For hardware channels,
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we can configure them to allow other hardware components to use it independently,
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which means we can just link one analog chip address to one hardware channel,
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then users can access the mapped analog chip address by this hardware channel
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triggered by hardware components instead of ADI software channels.
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Thus we introduce one property named "sprd,hw-channels" to configure hardware
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channels, the first value specifies the hardware channel id which is used to
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transfer data triggered by hardware automatically, and the second value specifies
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the analog chip address where user want to access by hardware components.
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Since we have multi-subsystems will use unique ADI to access analog chip, when
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one system is reading/writing data by ADI software channels, that should be under
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one hardware spinlock protection to prevent other systems from reading/writing
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data by ADI software channels at the same time, or two parallel routine of setting
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ADI registers will make ADI controller registers chaos to lead incorrect results.
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Then we need one hardware spinlock to synchronize between the multiple subsystems.
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Required properties:
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- compatible: Should be "sprd,sc9860-adi".
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- reg: Offset and length of ADI-SPI controller register space.
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- hwlocks: Reference to a phandle of a hwlock provider node.
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- hwlock-names: Reference to hwlock name strings defined in the same order
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as the hwlocks, should be "adi".
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- #address-cells: Number of cells required to define a chip select address
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on the ADI-SPI bus. Should be set to 1.
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- #size-cells: Size of cells required to define a chip select address size
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on the ADI-SPI bus. Should be set to 0.
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Optional properties:
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- sprd,hw-channels: This is an array of channel values up to 49 channels.
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The first value specifies the hardware channel id which is used to
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transfer data triggered by hardware automatically, and the second
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value specifies the analog chip address where user want to access
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by hardware components.
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SPI slave nodes must be children of the SPI controller node and can contain
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properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.
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Example:
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adi_bus: spi@40030000 {
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compatible = "sprd,sc9860-adi";
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reg = <0 0x40030000 0 0x10000>;
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hwlocks = <&hwlock1 0>;
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hwlock-names = "adi";
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#address-cells = <1>;
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#size-cells = <0>;
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sprd,hw-channels = <30 0x8c20>;
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};
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