387 lines
10 KiB
C
387 lines
10 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __MTK_PANEL_EXT_H__
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#define __MTK_PANEL_EXT_H__
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#include <drm/drm_panel.h>
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#define RT_MAX_NUM 10
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#define ESD_CHECK_NUM 3
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#if defined(CONFIG_SMCDSD_PANEL)
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#define MAX_TX_CMD_NUM 30
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#else
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#define MAX_TX_CMD_NUM 20
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#endif
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#define MAX_RX_CMD_NUM 20
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#define READ_DDIC_SLOT_NUM (4 * MAX_RX_CMD_NUM)
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#define MAX_DYN_CMD_NUM 20
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struct mtk_dsi;
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struct cmdq_pkt;
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struct mtk_panel_para_table {
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u8 count;
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u8 para_list[510];
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};
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/*
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* DSI data type:
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* DSI_DCS_WRITE_SHORT_PACKET_NO_PARAM 0x05
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* DSI_DCS_WRITE_SHORT_PACKET_1_PARAM 0x15
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* DSI_DCS_WRITE_LONG_PACKET 0x39
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* DSI_DCS_READ_NO_PARAM 0x06
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* DSI_GERNERIC_WRITE_SHORT_NO_PARAM 0x03
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* DSI_GERNERIC_WRITE_SHORT_1_PARAM 0x13
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* DSI_GERNERIC_WRITE_SHORT_1_PARAM 0x23
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* DSI_GERNERIC_WRITE_LONG_PACKET 0x29
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* DSI_GERNERIC_READ_NO_PARAM 0x04
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* DSI_GERNERIC_READ_1_PARAM 0x14
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* DSI_GERNERIC_READ_2_PARAM 0x24
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*/
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/**
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* struct mtk_ddic_dsi_msg - MTK write/read DDIC RG cmd buffer
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* @channel: virtual channel id
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* @flags: flags controlling this message transmission
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* @type: payload data type array
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* @tx_len: length of @tx_buf
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* @tx_buf: data array to be written
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* @tx_cmd_num: tx cmd number
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* @rx_len: length of @rx_buf
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* @rx_buf: data array to be read, or NULL
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* @rx_cmd_num: rx cmd number
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*/
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struct mtk_ddic_dsi_msg {
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u8 channel;
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u16 flags;
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u8 type[MAX_TX_CMD_NUM];
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size_t tx_len[MAX_TX_CMD_NUM];
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const void *tx_buf[MAX_TX_CMD_NUM];
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size_t tx_cmd_num;
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size_t rx_len[MAX_RX_CMD_NUM];
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void *rx_buf[MAX_RX_CMD_NUM];
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size_t rx_cmd_num;
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};
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struct DSI_RX_DATA_REG {
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unsigned char byte0;
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unsigned char byte1;
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unsigned char byte2;
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unsigned char byte3;
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};
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typedef void (*dcs_write_gce) (struct mtk_dsi *dsi, struct cmdq_pkt *handle,
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const void *data, size_t len);
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typedef void (*dcs_grp_write_gce) (struct mtk_dsi *dsi, struct cmdq_pkt *handle,
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struct mtk_panel_para_table *para_table,
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unsigned int para_size);
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typedef int (*panel_tch_rst) (void);
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enum MTK_PANEL_OUTPUT_MODE {
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MTK_PANEL_SINGLE_PORT = 0x0,
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MTK_PANEL_DSC_SINGLE_PORT,
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MTK_PANEL_DUAL_PORT,
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};
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struct esd_check_item {
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unsigned char cmd;
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unsigned char count;
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unsigned char para_list[RT_MAX_NUM];
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unsigned char mask_list[RT_MAX_NUM];
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};
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enum MTK_PANEL_MODE_SWITCH_STAGE {
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BEFORE_DSI_POWERDOWN,
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AFTER_DSI_POWERON,
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};
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enum MIPITX_PHY_PORT {
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MIPITX_PHY_PORT_0 = 0,
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MIPITX_PHY_PORT_1,
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MIPITX_PHY_PORT_NUM
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};
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enum MIPITX_PHY_LANE_SWAP {
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MIPITX_PHY_LANE_0 = 0,
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MIPITX_PHY_LANE_1,
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MIPITX_PHY_LANE_2,
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MIPITX_PHY_LANE_3,
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MIPITX_PHY_LANE_CK,
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MIPITX_PHY_LANE_RX,
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MIPITX_PHY_LANE_NUM
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};
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enum FPS_CHANGE_INDEX {
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DYNFPS_NOT_DEFINED = 0,
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DYNFPS_DSI_VFP = 1,
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DYNFPS_DSI_HFP = 2,
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DYNFPS_DSI_MIPI_CLK = 4,
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};
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struct dsc_rc_range_parameters {
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/**
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* @range_min_qp: Min Quantization Parameters allowed for this range
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*/
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u8 range_min_qp;
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/**
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* @range_max_qp: Max Quantization Parameters allowed for this range
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*/
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u8 range_max_qp;
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/**
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* @range_bpg_offset:
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* Bits/group offset to apply to target for this group
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*/
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u8 range_bpg_offset;
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};
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struct mtk_panel_dsc_params {
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unsigned int enable;
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unsigned int bdg_dsc_enable;
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unsigned int ver; /* [7:4] major [3:0] minor */
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unsigned int slice_mode;
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unsigned int rgb_swap;
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unsigned int dsc_cfg;
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unsigned int rct_on;
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unsigned int bit_per_channel;
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unsigned int dsc_line_buf_depth;
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unsigned int bp_enable;
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unsigned int bit_per_pixel;
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unsigned int pic_height; /* need to check */
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unsigned int pic_width; /* need to check */
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unsigned int slice_height;
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unsigned int slice_width;
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unsigned int chunk_size;
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unsigned int xmit_delay;
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unsigned int dec_delay;
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unsigned int scale_value;
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unsigned int increment_interval;
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unsigned int decrement_interval;
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unsigned int line_bpg_offset;
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unsigned int nfl_bpg_offset;
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unsigned int slice_bpg_offset;
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unsigned int initial_offset;
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unsigned int final_offset;
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unsigned int flatness_minqp;
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unsigned int flatness_maxqp;
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unsigned int rc_model_size;
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unsigned int rc_edge_factor;
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unsigned int rc_quant_incr_limit0;
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unsigned int rc_quant_incr_limit1;
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unsigned int rc_tgt_offset_hi;
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unsigned int rc_tgt_offset_lo;
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unsigned int rc_buf_thresh[14];
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struct dsc_rc_range_parameters rc_range_parameters[15];
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};
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struct mtk_dsi_phy_timcon {
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unsigned int hs_trail;
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unsigned int hs_prpr;
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unsigned int hs_zero;
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unsigned int lpx;
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unsigned int ta_get;
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unsigned int ta_sure;
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unsigned int ta_go;
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unsigned int da_hs_exit;
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unsigned int clk_trail;
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unsigned int cont_det;
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unsigned int da_hs_sync;
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unsigned int clk_zero;
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unsigned int clk_hs_prpr;
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unsigned int clk_hs_exit;
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unsigned int clk_hs_post;
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};
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struct dynamic_mipi_params {
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unsigned int switch_en;
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unsigned int pll_clk;
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unsigned int data_rate;
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unsigned int vsa;
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unsigned int vbp;
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unsigned int vfp;
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unsigned int vfp_lp_dyn;
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unsigned int hsa;
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unsigned int hbp;
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unsigned int hfp;
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};
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struct dfps_switch_cmd {
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unsigned int src_fps;
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unsigned int cmd_num;
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unsigned char para_list[64];
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};
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struct dynamic_fps_params {
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unsigned int switch_en;
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unsigned int vact_timing_fps;
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unsigned int data_rate;
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struct dfps_switch_cmd dfps_cmd_table[MAX_DYN_CMD_NUM];
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};
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struct mtk_panel_params {
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#if defined(CONFIG_SMCDSD_PANEL)
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struct drm_panel *dpanel;
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#endif
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unsigned int pll_clk;
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unsigned int data_rate;
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struct mtk_dsi_phy_timcon phy_timcon;
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unsigned int vfp_low_power;
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struct dynamic_mipi_params dyn;
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struct dynamic_fps_params dyn_fps;
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unsigned int cust_esd_check;
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unsigned int esd_check_enable;
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struct esd_check_item lcm_esd_check_table[ESD_CHECK_NUM];
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unsigned int ssc_disable;
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unsigned int bdg_ssc_disable;
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unsigned int ssc_range;
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int lcm_color_mode;
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unsigned int min_luminance;
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unsigned int average_luminance;
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unsigned int max_luminance;
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unsigned int round_corner_en;
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unsigned int corner_pattern_height;
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unsigned int corner_pattern_height_bot;
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unsigned int corner_pattern_tp_size;
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unsigned int corner_pattern_tp_size_l;
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unsigned int corner_pattern_tp_size_r;
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void *corner_pattern_lt_addr;
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void *corner_pattern_lt_addr_l;
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void *corner_pattern_lt_addr_r;
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unsigned int physical_width_um;
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unsigned int physical_height_um;
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unsigned int lane_swap_en;
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unsigned int is_cphy;
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enum MIPITX_PHY_LANE_SWAP
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lane_swap[MIPITX_PHY_PORT_NUM][MIPITX_PHY_LANE_NUM];
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struct mtk_panel_dsc_params dsc_params;
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unsigned int output_mode;
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unsigned int lcm_cmd_if;
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unsigned int hbm_en_time;
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unsigned int hbm_dis_time;
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unsigned int lcm_index;
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unsigned int wait_sof_before_dec_vfp;
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unsigned int doze_delay;
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//Settings for LFR Function:
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unsigned int lfr_enable;
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unsigned int lfr_minimum_fps;
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};
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struct mtk_panel_ext {
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struct mtk_panel_funcs *funcs;
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struct mtk_panel_params *params;
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};
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struct mtk_panel_ctx {
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struct drm_panel *panel;
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struct mtk_panel_ext *ext;
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struct list_head list;
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};
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struct mtk_panel_funcs {
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#if defined(CONFIG_SMCDSD_PANEL)
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int (*late_register)(struct drm_panel *panel);
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int (*set_power)(struct drm_panel *panel, int power);
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int (*crtc_state_notify)(struct drm_panel *panel, int active, int prepare);
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int (*framedone_notify)(struct drm_panel *panel);
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#endif
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int (*set_backlight_cmdq)(void *dsi_drv, dcs_write_gce cb,
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void *handle, unsigned int level);
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int (*set_dispon_cmdq)(struct drm_panel *panel);
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int (*set_aod_light_mode)(void *dsi_drv, dcs_write_gce cb,
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void *handle, unsigned int mode);
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int (*set_backlight_grp_cmdq)(void *dsi_drv, dcs_grp_write_gce cb,
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void *handle, unsigned int level);
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int (*reset)(struct drm_panel *panel, int on);
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int (*ata_check)(struct drm_panel *panel);
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int (*ext_param_set)(struct drm_panel *panel, unsigned int mode);
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int (*ext_param_get)(struct mtk_panel_params *ext_para,
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unsigned int mode);
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int (*mode_switch)(struct drm_panel *panel, unsigned int cur_mode,
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unsigned int dst_mode, enum MTK_PANEL_MODE_SWITCH_STAGE stage);
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int (*get_virtual_heigh)(void);
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int (*get_virtual_width)(void);
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/**
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* @doze_enable_start:
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*
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* Call the @doze_enable_start before starting AOD mode.
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* The LCM off may add here to avoid panel show unexpected
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* content when switching to specific panel low power mode.
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*/
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int (*doze_enable_start)(struct drm_panel *panel,
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void *dsi_drv, dcs_write_gce cb, void *handle);
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/**
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* @doze_enable:
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*
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* Call the @doze_enable starts AOD mode.
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*/
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int (*doze_enable)(struct drm_panel *panel,
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void *dsi_drv, dcs_write_gce cb, void *handle);
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/**
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* @doze_disable:
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*
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* Call the @doze_disable before ending AOD mode.
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*/
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int (*doze_disable)(struct drm_panel *panel,
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void *dsi_drv, dcs_write_gce cb, void *handle);
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/**
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* @doze_post_disp_on:
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*
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* In some situation, the LCM off may set in @doze_enable & @disable.
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* After LCM switch to the new mode stable, system call
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* @doze_post_disp_on to turn on panel.
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*/
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int (*doze_post_disp_on)(struct drm_panel *panel,
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void *dsi_drv, dcs_write_gce cb, void *handle);
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/**
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* @doze_area:
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*
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* Send the panel area in command here.
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*/
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int (*doze_area)(struct drm_panel *panel,
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void *dsi_drv, dcs_write_gce cb, void *handle);
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/**
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* @doze_get_mode_flags:
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*
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* If CV switch is needed for doze mode, fill the mode_flags in this
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* function for both CMD and VDO mode.
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*/
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unsigned long (*doze_get_mode_flags)(
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struct drm_panel *panel, int aod_en);
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int (*hbm_set_cmdq)(struct drm_panel *panel, void *dsi_drv,
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dcs_write_gce cb, void *handle, bool en);
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int (*hbm_set_lcm_cmdq)(struct drm_panel *panel, bool en);
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||
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void (*hbm_get_state)(struct drm_panel *panel, bool *state);
|
||
|
|
void (*hbm_get_wait_state)(struct drm_panel *panel, bool *wait);
|
||
|
|
bool (*hbm_set_wait_state)(struct drm_panel *panel, bool wait);
|
||
|
|
};
|
||
|
|
|
||
|
|
void mtk_panel_init(struct mtk_panel_ctx *ctx);
|
||
|
|
void mtk_panel_add(struct mtk_panel_ctx *ctx);
|
||
|
|
void mtk_panel_remove(struct mtk_panel_ctx *ctx);
|
||
|
|
int mtk_panel_attach(struct mtk_panel_ctx *ctx, struct drm_panel *panel);
|
||
|
|
int mtk_panel_detach(struct mtk_panel_ctx *ctx);
|
||
|
|
struct mtk_panel_ext *find_panel_ext(struct drm_panel *panel);
|
||
|
|
int mtk_panel_ext_create(struct device *dev,
|
||
|
|
struct mtk_panel_params *ext_params,
|
||
|
|
struct mtk_panel_funcs *ext_funcs,
|
||
|
|
struct drm_panel *panel);
|
||
|
|
int mtk_panel_tch_handle_reg(struct drm_panel *panel);
|
||
|
|
void **mtk_panel_tch_handle_init(void);
|
||
|
|
int mtk_panel_tch_rst(struct drm_panel *panel);
|
||
|
|
|
||
|
|
#endif
|