415 lines
9.2 KiB
C
415 lines
9.2 KiB
C
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/*
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* Driver for the ST Microelectronics SPEAr310 pinmux
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*
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* Copyright (C) 2012 ST Microelectronics
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* Viresh Kumar <vireshk@kernel.org>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "pinctrl-spear3xx.h"
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#define DRIVER_NAME "spear310-pinmux"
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/* addresses */
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#define PMX_CONFIG_REG 0x08
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/* emi_cs_0_to_5_pins */
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static const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 };
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static struct spear_muxreg emi_cs_0_to_5_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux emi_cs_0_to_5_modemux[] = {
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{
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.muxregs = emi_cs_0_to_5_muxreg,
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.nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg),
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},
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};
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static struct spear_pingroup emi_cs_0_to_5_pingroup = {
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.name = "emi_cs_0_to_5_grp",
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.pins = emi_cs_0_to_5_pins,
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.npins = ARRAY_SIZE(emi_cs_0_to_5_pins),
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.modemuxs = emi_cs_0_to_5_modemux,
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.nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux),
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};
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static const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" };
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static struct spear_function emi_cs_0_to_5_function = {
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.name = "emi",
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.groups = emi_cs_0_to_5_grps,
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.ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps),
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};
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/* uart1_pins */
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static const unsigned uart1_pins[] = { 0, 1 };
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static struct spear_muxreg uart1_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_FIRDA_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux uart1_modemux[] = {
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{
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.muxregs = uart1_muxreg,
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.nmuxregs = ARRAY_SIZE(uart1_muxreg),
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},
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};
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static struct spear_pingroup uart1_pingroup = {
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.name = "uart1_grp",
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.pins = uart1_pins,
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.npins = ARRAY_SIZE(uart1_pins),
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.modemuxs = uart1_modemux,
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.nmodemuxs = ARRAY_SIZE(uart1_modemux),
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};
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static const char *const uart1_grps[] = { "uart1_grp" };
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static struct spear_function uart1_function = {
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.name = "uart1",
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.groups = uart1_grps,
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.ngroups = ARRAY_SIZE(uart1_grps),
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};
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/* uart2_pins */
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static const unsigned uart2_pins[] = { 43, 44 };
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static struct spear_muxreg uart2_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_TIMER_0_1_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux uart2_modemux[] = {
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{
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.muxregs = uart2_muxreg,
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.nmuxregs = ARRAY_SIZE(uart2_muxreg),
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},
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};
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static struct spear_pingroup uart2_pingroup = {
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.name = "uart2_grp",
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.pins = uart2_pins,
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.npins = ARRAY_SIZE(uart2_pins),
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.modemuxs = uart2_modemux,
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.nmodemuxs = ARRAY_SIZE(uart2_modemux),
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};
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static const char *const uart2_grps[] = { "uart2_grp" };
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static struct spear_function uart2_function = {
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.name = "uart2",
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.groups = uart2_grps,
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.ngroups = ARRAY_SIZE(uart2_grps),
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};
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/* uart3_pins */
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static const unsigned uart3_pins[] = { 37, 38 };
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static struct spear_muxreg uart3_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_UART0_MODEM_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux uart3_modemux[] = {
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{
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.muxregs = uart3_muxreg,
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.nmuxregs = ARRAY_SIZE(uart3_muxreg),
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},
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};
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static struct spear_pingroup uart3_pingroup = {
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.name = "uart3_grp",
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.pins = uart3_pins,
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.npins = ARRAY_SIZE(uart3_pins),
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.modemuxs = uart3_modemux,
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.nmodemuxs = ARRAY_SIZE(uart3_modemux),
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};
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static const char *const uart3_grps[] = { "uart3_grp" };
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static struct spear_function uart3_function = {
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.name = "uart3",
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.groups = uart3_grps,
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.ngroups = ARRAY_SIZE(uart3_grps),
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};
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/* uart4_pins */
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static const unsigned uart4_pins[] = { 39, 40 };
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static struct spear_muxreg uart4_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_UART0_MODEM_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux uart4_modemux[] = {
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{
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.muxregs = uart4_muxreg,
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.nmuxregs = ARRAY_SIZE(uart4_muxreg),
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},
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};
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static struct spear_pingroup uart4_pingroup = {
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.name = "uart4_grp",
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.pins = uart4_pins,
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.npins = ARRAY_SIZE(uart4_pins),
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.modemuxs = uart4_modemux,
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.nmodemuxs = ARRAY_SIZE(uart4_modemux),
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};
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static const char *const uart4_grps[] = { "uart4_grp" };
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static struct spear_function uart4_function = {
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.name = "uart4",
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.groups = uart4_grps,
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.ngroups = ARRAY_SIZE(uart4_grps),
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};
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/* uart5_pins */
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static const unsigned uart5_pins[] = { 41, 42 };
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static struct spear_muxreg uart5_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_UART0_MODEM_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux uart5_modemux[] = {
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{
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.muxregs = uart5_muxreg,
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.nmuxregs = ARRAY_SIZE(uart5_muxreg),
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},
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};
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static struct spear_pingroup uart5_pingroup = {
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.name = "uart5_grp",
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.pins = uart5_pins,
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.npins = ARRAY_SIZE(uart5_pins),
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.modemuxs = uart5_modemux,
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.nmodemuxs = ARRAY_SIZE(uart5_modemux),
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};
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static const char *const uart5_grps[] = { "uart5_grp" };
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static struct spear_function uart5_function = {
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.name = "uart5",
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.groups = uart5_grps,
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.ngroups = ARRAY_SIZE(uart5_grps),
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};
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/* fsmc_pins */
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static const unsigned fsmc_pins[] = { 34, 35, 36 };
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static struct spear_muxreg fsmc_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_SSP_CS_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux fsmc_modemux[] = {
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{
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.muxregs = fsmc_muxreg,
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.nmuxregs = ARRAY_SIZE(fsmc_muxreg),
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},
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};
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static struct spear_pingroup fsmc_pingroup = {
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.name = "fsmc_grp",
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.pins = fsmc_pins,
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.npins = ARRAY_SIZE(fsmc_pins),
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.modemuxs = fsmc_modemux,
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.nmodemuxs = ARRAY_SIZE(fsmc_modemux),
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};
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static const char *const fsmc_grps[] = { "fsmc_grp" };
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static struct spear_function fsmc_function = {
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.name = "fsmc",
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.groups = fsmc_grps,
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.ngroups = ARRAY_SIZE(fsmc_grps),
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};
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/* rs485_0_pins */
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static const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 };
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static struct spear_muxreg rs485_0_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_MII_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux rs485_0_modemux[] = {
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{
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.muxregs = rs485_0_muxreg,
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.nmuxregs = ARRAY_SIZE(rs485_0_muxreg),
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},
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};
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static struct spear_pingroup rs485_0_pingroup = {
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.name = "rs485_0_grp",
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.pins = rs485_0_pins,
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.npins = ARRAY_SIZE(rs485_0_pins),
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.modemuxs = rs485_0_modemux,
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.nmodemuxs = ARRAY_SIZE(rs485_0_modemux),
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};
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static const char *const rs485_0_grps[] = { "rs485_0" };
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static struct spear_function rs485_0_function = {
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.name = "rs485_0",
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.groups = rs485_0_grps,
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.ngroups = ARRAY_SIZE(rs485_0_grps),
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};
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/* rs485_1_pins */
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static const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 };
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static struct spear_muxreg rs485_1_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_MII_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux rs485_1_modemux[] = {
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{
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.muxregs = rs485_1_muxreg,
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.nmuxregs = ARRAY_SIZE(rs485_1_muxreg),
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},
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};
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static struct spear_pingroup rs485_1_pingroup = {
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.name = "rs485_1_grp",
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.pins = rs485_1_pins,
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.npins = ARRAY_SIZE(rs485_1_pins),
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.modemuxs = rs485_1_modemux,
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.nmodemuxs = ARRAY_SIZE(rs485_1_modemux),
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};
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static const char *const rs485_1_grps[] = { "rs485_1" };
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static struct spear_function rs485_1_function = {
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.name = "rs485_1",
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.groups = rs485_1_grps,
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.ngroups = ARRAY_SIZE(rs485_1_grps),
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};
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/* tdm_pins */
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static const unsigned tdm_pins[] = { 10, 11, 12, 13 };
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static struct spear_muxreg tdm_muxreg[] = {
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{
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.reg = PMX_CONFIG_REG,
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.mask = PMX_MII_MASK,
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.val = 0,
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},
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};
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static struct spear_modemux tdm_modemux[] = {
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{
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.muxregs = tdm_muxreg,
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.nmuxregs = ARRAY_SIZE(tdm_muxreg),
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},
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};
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static struct spear_pingroup tdm_pingroup = {
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.name = "tdm_grp",
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.pins = tdm_pins,
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.npins = ARRAY_SIZE(tdm_pins),
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.modemuxs = tdm_modemux,
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.nmodemuxs = ARRAY_SIZE(tdm_modemux),
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};
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static const char *const tdm_grps[] = { "tdm_grp" };
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static struct spear_function tdm_function = {
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.name = "tdm",
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.groups = tdm_grps,
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.ngroups = ARRAY_SIZE(tdm_grps),
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};
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/* pingroups */
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static struct spear_pingroup *spear310_pingroups[] = {
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SPEAR3XX_COMMON_PINGROUPS,
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&emi_cs_0_to_5_pingroup,
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&uart1_pingroup,
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&uart2_pingroup,
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&uart3_pingroup,
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&uart4_pingroup,
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&uart5_pingroup,
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&fsmc_pingroup,
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&rs485_0_pingroup,
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&rs485_1_pingroup,
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&tdm_pingroup,
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};
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/* functions */
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static struct spear_function *spear310_functions[] = {
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SPEAR3XX_COMMON_FUNCTIONS,
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&emi_cs_0_to_5_function,
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&uart1_function,
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&uart2_function,
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&uart3_function,
|
||
|
|
&uart4_function,
|
||
|
|
&uart5_function,
|
||
|
|
&fsmc_function,
|
||
|
|
&rs485_0_function,
|
||
|
|
&rs485_1_function,
|
||
|
|
&tdm_function,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct of_device_id spear310_pinctrl_of_match[] = {
|
||
|
|
{
|
||
|
|
.compatible = "st,spear310-pinmux",
|
||
|
|
},
|
||
|
|
{},
|
||
|
|
};
|
||
|
|
|
||
|
|
static int spear310_pinctrl_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
spear3xx_machdata.groups = spear310_pingroups;
|
||
|
|
spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups);
|
||
|
|
spear3xx_machdata.functions = spear310_functions;
|
||
|
|
spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions);
|
||
|
|
|
||
|
|
pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG);
|
||
|
|
pmx_init_gpio_pingroup_addr(spear3xx_machdata.gpio_pingroups,
|
||
|
|
spear3xx_machdata.ngpio_pingroups, PMX_CONFIG_REG);
|
||
|
|
|
||
|
|
spear3xx_machdata.modes_supported = false;
|
||
|
|
|
||
|
|
ret = spear_pinctrl_probe(pdev, &spear3xx_machdata);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver spear310_pinctrl_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = DRIVER_NAME,
|
||
|
|
.of_match_table = spear310_pinctrl_of_match,
|
||
|
|
},
|
||
|
|
.probe = spear310_pinctrl_probe,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int __init spear310_pinctrl_init(void)
|
||
|
|
{
|
||
|
|
return platform_driver_register(&spear310_pinctrl_driver);
|
||
|
|
}
|
||
|
|
arch_initcall(spear310_pinctrl_init);
|