2024-04-28 06:49:01 -07:00
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/*
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* Based on arch/arm/kernel/process.c
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*
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* Original Copyright (C) 1995 Linus Torvalds
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* Copyright (C) 1996-2000 Russell King - Converted to ARM.
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdarg.h>
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#include <linux/compat.h>
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#include <linux/efi.h>
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#include <linux/export.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/task.h>
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#include <linux/sched/task_stack.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/sysctl.h>
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#include <linux/unistd.h>
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#include <linux/user.h>
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#include <linux/delay.h>
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#include <linux/reboot.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <linux/elfcore.h>
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#include <linux/pm.h>
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#include <linux/tick.h>
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#include <linux/utsname.h>
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#include <linux/uaccess.h>
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#include <linux/random.h>
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#include <linux/hw_breakpoint.h>
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#include <linux/personality.h>
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#include <linux/notifier.h>
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#include <trace/events/power.h>
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#include <linux/percpu.h>
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#include <linux/thread_info.h>
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#include <linux/prctl.h>
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#ifdef CONFIG_SEC_DEBUG
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#include <linux/sec_debug.h>
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#endif
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#include <asm/alternative.h>
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#include <asm/compat.h>
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#include <asm/cacheflush.h>
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#include <asm/exec.h>
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#include <asm/fpsimd.h>
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#include <asm/mmu_context.h>
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#include <asm/processor.h>
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#include <asm/scs.h>
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#include <asm/stacktrace.h>
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#ifdef CONFIG_STACKPROTECTOR
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#include <linux/stackprotector.h>
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unsigned long __stack_chk_guard __read_mostly;
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EXPORT_SYMBOL(__stack_chk_guard);
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#endif
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/*
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* Function pointers to optional machine specific functions
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*/
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void (*pm_power_off)(void);
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EXPORT_SYMBOL_GPL(pm_power_off);
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void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
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EXPORT_SYMBOL_GPL(arm_pm_restart);
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/*
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* This is our default idle handler.
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*/
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void arch_cpu_idle(void)
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{
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/*
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* This should do all the clock switching and wait for interrupt
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* tricks
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*/
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trace_cpu_idle_rcuidle(1, smp_processor_id());
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cpu_do_idle();
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local_irq_enable();
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trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void arch_cpu_idle_dead(void)
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{
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cpu_die();
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}
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#endif
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/*
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* Called by kexec, immediately prior to machine_kexec().
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*
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* This must completely disable all secondary CPUs; simply causing those CPUs
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* to execute e.g. a RAM-based pin loop is not sufficient. This allows the
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* kexec'd kernel to use any and all RAM as it sees fit, without having to
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* avoid any code or data used by any SW CPU pin loop. The CPU hotplug
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* functionality embodied in disable_nonboot_cpus() to achieve this.
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*/
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void machine_shutdown(void)
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{
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disable_nonboot_cpus();
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}
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/*
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* Halting simply requires that the secondary CPUs stop performing any
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* activity (executing tasks, handling interrupts). smp_send_stop()
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* achieves this.
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*/
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void machine_halt(void)
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{
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local_irq_disable();
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smp_send_stop();
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while (1);
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}
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/*
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* Power-off simply requires that the secondary CPUs stop performing any
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* activity (executing tasks, handling interrupts). smp_send_stop()
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* achieves this. When the system power is turned off, it will take all CPUs
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* with it.
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*/
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void machine_power_off(void)
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{
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local_irq_disable();
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smp_send_stop();
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if (pm_power_off)
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pm_power_off();
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}
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/*
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* Restart requires that the secondary CPUs stop performing any activity
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* while the primary CPU resets the system. Systems with multiple CPUs must
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* provide a HW restart implementation, to ensure that all CPUs reset at once.
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* This is required so that any code running after reset on the primary CPU
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* doesn't have to co-ordinate with other CPUs to ensure they aren't still
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* executing pre-reset code, and using RAM that the primary CPU's code wishes
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* to use. Implementing such co-ordination would be essentially impossible.
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*/
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void machine_restart(char *cmd)
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{
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/* Disable interrupts first */
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local_irq_disable();
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smp_send_stop();
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/*
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* UpdateCapsule() depends on the system being reset via
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* ResetSystem().
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*/
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if (efi_enabled(EFI_RUNTIME_SERVICES))
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efi_reboot(reboot_mode, NULL);
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/* Now call the architecture specific reboot code. */
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if (arm_pm_restart)
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arm_pm_restart(reboot_mode, cmd);
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else
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do_kernel_restart(cmd);
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/*
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* Whoops - the architecture was unable to reboot.
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*/
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printk("Reboot failed -- System halted\n");
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while (1);
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}
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static void print_pstate(struct pt_regs *regs)
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{
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u64 pstate = regs->pstate;
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if (compat_user_mode(regs)) {
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printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
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pstate,
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pstate & PSR_AA32_N_BIT ? 'N' : 'n',
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pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
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pstate & PSR_AA32_C_BIT ? 'C' : 'c',
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pstate & PSR_AA32_V_BIT ? 'V' : 'v',
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pstate & PSR_AA32_Q_BIT ? 'Q' : 'q',
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pstate & PSR_AA32_T_BIT ? "T32" : "A32",
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pstate & PSR_AA32_E_BIT ? "BE" : "LE",
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pstate & PSR_AA32_A_BIT ? 'A' : 'a',
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pstate & PSR_AA32_I_BIT ? 'I' : 'i',
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pstate & PSR_AA32_F_BIT ? 'F' : 'f');
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} else {
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printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n",
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pstate,
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pstate & PSR_N_BIT ? 'N' : 'n',
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pstate & PSR_Z_BIT ? 'Z' : 'z',
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pstate & PSR_C_BIT ? 'C' : 'c',
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pstate & PSR_V_BIT ? 'V' : 'v',
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pstate & PSR_D_BIT ? 'D' : 'd',
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pstate & PSR_A_BIT ? 'A' : 'a',
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pstate & PSR_I_BIT ? 'I' : 'i',
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pstate & PSR_F_BIT ? 'F' : 'f',
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pstate & PSR_PAN_BIT ? '+' : '-',
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pstate & PSR_UAO_BIT ? '+' : '-');
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}
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}
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/*
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* dump a block of kernel memory from around the given address
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*/
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static void show_data(unsigned long addr, int nbytes, const char *name)
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{
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int i, j;
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int nlines;
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u32 *p;
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/*
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* don't attempt to dump non-kernel addresses or
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* values that are probably just small negative numbers
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*/
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2024-04-28 06:51:13 -07:00
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if (addr < VA_START || addr > -256UL)
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2024-04-28 06:49:01 -07:00
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return;
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printk("\n%s: %#lx:\n", name, addr);
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/*
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* round address down to a 32 bit boundary
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* and always dump a multiple of 32 bytes
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*/
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p = (u32 *)(addr & ~(sizeof(u32) - 1));
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nbytes += (addr & (sizeof(u32) - 1));
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nlines = (nbytes + 31) / 32;
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for (i = 0; i < nlines; i++) {
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/*
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* just display low 16 bits of address to keep
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* each line of the dump < 80 characters
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*/
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printk("%04lx ", (unsigned long)p & 0xffff);
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for (j = 0; j < 8; j++) {
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u32 data;
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if (probe_kernel_address(p, data)) {
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2024-04-28 06:51:13 -07:00
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pr_cont(" ********");
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2024-04-28 06:49:01 -07:00
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} else {
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2024-04-28 06:51:13 -07:00
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pr_cont(" %08x", data);
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2024-04-28 06:49:01 -07:00
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}
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++p;
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}
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2024-04-28 06:51:13 -07:00
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pr_cont("\n");
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2024-04-28 06:49:01 -07:00
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}
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}
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static void show_extra_register_data(struct pt_regs *regs, int nbytes)
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{
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mm_segment_t fs;
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unsigned int i;
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fs = get_fs();
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set_fs(KERNEL_DS);
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show_data(regs->pc - nbytes, nbytes * 2, "PC");
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show_data(regs->regs[30] - nbytes, nbytes * 2, "LR");
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show_data(regs->sp - nbytes, nbytes * 2, "SP");
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for (i = 0; i < 30; i++) {
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char name[4];
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snprintf(name, sizeof(name), "X%u", i);
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show_data(regs->regs[i] - nbytes, nbytes * 2, name);
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}
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set_fs(fs);
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}
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void __show_regs(struct pt_regs *regs)
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{
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int i, top_reg;
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u64 lr, sp;
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if (compat_user_mode(regs)) {
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lr = regs->compat_lr;
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sp = regs->compat_sp;
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top_reg = 12;
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} else {
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lr = regs->regs[30];
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sp = regs->sp;
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top_reg = 29;
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}
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#ifdef CONFIG_SEC_DEBUG
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if (!user_mode(regs)) {
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sec_save_context(_THIS_CPU, regs);
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}
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#endif
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show_regs_print_info(KERN_DEFAULT);
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print_pstate(regs);
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if (!user_mode(regs)) {
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printk("pc : %pS\n", (void *)regs->pc);
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printk("lr : %pS\n", (void *)lr);
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} else {
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printk("pc : %016llx\n", regs->pc);
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printk("lr : %016llx\n", lr);
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}
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printk("sp : %016llx\n", sp);
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i = top_reg;
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while (i >= 0) {
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printk("x%-2d: %016llx ", i, regs->regs[i]);
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i--;
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if (i % 2 == 0) {
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pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
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i--;
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}
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pr_cont("\n");
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}
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if (!user_mode(regs))
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show_extra_register_data(regs, 128);
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printk("\n");
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}
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void show_regs(struct pt_regs * regs)
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{
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__show_regs(regs);
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dump_backtrace(regs, NULL);
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}
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static void tls_thread_flush(void)
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{
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write_sysreg(0, tpidr_el0);
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if (is_compat_task()) {
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current->thread.uw.tp_value = 0;
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/*
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* We need to ensure ordering between the shadow state and the
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* hardware state, so that we don't corrupt the hardware state
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* with a stale shadow state during context switch.
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*/
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barrier();
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write_sysreg(0, tpidrro_el0);
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}
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}
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static void flush_tagged_addr_state(void)
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{
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if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI))
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clear_thread_flag(TIF_TAGGED_ADDR);
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}
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void flush_thread(void)
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{
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fpsimd_flush_thread();
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tls_thread_flush();
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flush_ptrace_hw_breakpoint(current);
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flush_tagged_addr_state();
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}
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void release_thread(struct task_struct *dead_task)
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{
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}
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void arch_release_task_struct(struct task_struct *tsk)
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{
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|
|
fpsimd_release_task(tsk);
|
|
|
|
}
|
|
|
|
|
|
|
|
int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
|
|
|
|
{
|
|
|
|
if (current->mm)
|
|
|
|
fpsimd_preserve_current_state();
|
|
|
|
*dst = *src;
|
|
|
|
|
|
|
|
/* We rely on the above assignment to initialize dst's thread_flags: */
|
|
|
|
BUILD_BUG_ON(!IS_ENABLED(CONFIG_THREAD_INFO_IN_TASK));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Detach src's sve_state (if any) from dst so that it does not
|
|
|
|
* get erroneously used or freed prematurely. dst's sve_state
|
|
|
|
* will be allocated on demand later on if dst uses SVE.
|
|
|
|
* For consistency, also clear TIF_SVE here: this could be done
|
|
|
|
* later in copy_process(), but to avoid tripping up future
|
|
|
|
* maintainers it is best not to leave TIF_SVE and sve_state in
|
|
|
|
* an inconsistent state, even temporarily.
|
|
|
|
*/
|
|
|
|
dst->thread.sve_state = NULL;
|
|
|
|
clear_tsk_thread_flag(dst, TIF_SVE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage void ret_from_fork(void) asm("ret_from_fork");
|
|
|
|
|
|
|
|
int copy_thread(unsigned long clone_flags, unsigned long stack_start,
|
|
|
|
unsigned long stk_sz, struct task_struct *p)
|
|
|
|
{
|
|
|
|
struct pt_regs *childregs = task_pt_regs(p);
|
|
|
|
|
|
|
|
memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In case p was allocated the same task_struct pointer as some
|
|
|
|
* other recently-exited task, make sure p is disassociated from
|
|
|
|
* any cpu that may have run that now-exited task recently.
|
|
|
|
* Otherwise we could erroneously skip reloading the FPSIMD
|
|
|
|
* registers for p.
|
|
|
|
*/
|
|
|
|
fpsimd_flush_task_state(p);
|
|
|
|
|
|
|
|
if (likely(!(p->flags & PF_KTHREAD))) {
|
|
|
|
*childregs = *current_pt_regs();
|
|
|
|
childregs->regs[0] = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the current TLS pointer from tpidr_el0 as it may be
|
|
|
|
* out-of-sync with the saved value.
|
|
|
|
*/
|
|
|
|
*task_user_tls(p) = read_sysreg(tpidr_el0);
|
|
|
|
|
|
|
|
if (stack_start) {
|
|
|
|
if (is_compat_thread(task_thread_info(p)))
|
|
|
|
childregs->compat_sp = stack_start;
|
|
|
|
else
|
|
|
|
childregs->sp = stack_start;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If a TLS pointer was passed to clone (4th argument), use it
|
|
|
|
* for the new thread.
|
|
|
|
*/
|
|
|
|
if (clone_flags & CLONE_SETTLS)
|
|
|
|
p->thread.uw.tp_value = childregs->regs[3];
|
|
|
|
} else {
|
|
|
|
memset(childregs, 0, sizeof(struct pt_regs));
|
|
|
|
childregs->pstate = PSR_MODE_EL1h;
|
|
|
|
if (IS_ENABLED(CONFIG_ARM64_UAO) &&
|
|
|
|
cpus_have_const_cap(ARM64_HAS_UAO))
|
|
|
|
childregs->pstate |= PSR_UAO_BIT;
|
|
|
|
|
|
|
|
if (arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE)
|
|
|
|
set_ssbs_bit(childregs);
|
|
|
|
|
|
|
|
p->thread.cpu_context.x19 = stack_start;
|
|
|
|
p->thread.cpu_context.x20 = stk_sz;
|
|
|
|
}
|
|
|
|
p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
|
|
|
|
p->thread.cpu_context.sp = (unsigned long)childregs;
|
|
|
|
|
|
|
|
ptrace_hw_copy_thread(p);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void tls_preserve_current_state(void)
|
|
|
|
{
|
|
|
|
*task_user_tls(current) = read_sysreg(tpidr_el0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tls_thread_switch(struct task_struct *next)
|
|
|
|
{
|
|
|
|
tls_preserve_current_state();
|
|
|
|
|
|
|
|
if (is_compat_thread(task_thread_info(next)))
|
|
|
|
write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
|
|
|
|
else if (!arm64_kernel_unmapped_at_el0())
|
|
|
|
write_sysreg(0, tpidrro_el0);
|
|
|
|
|
|
|
|
write_sysreg(*task_user_tls(next), tpidr_el0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Restore the UAO state depending on next's addr_limit */
|
|
|
|
void uao_thread_switch(struct task_struct *next)
|
|
|
|
{
|
|
|
|
if (IS_ENABLED(CONFIG_ARM64_UAO)) {
|
|
|
|
if (task_thread_info(next)->addr_limit == KERNEL_DS)
|
|
|
|
asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
|
|
|
|
else
|
|
|
|
asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Force SSBS state on context-switch, since it may be lost after migrating
|
|
|
|
* from a CPU which treats the bit as RES0 in a heterogeneous system.
|
|
|
|
*/
|
|
|
|
static void ssbs_thread_switch(struct task_struct *next)
|
|
|
|
{
|
|
|
|
struct pt_regs *regs = task_pt_regs(next);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Nothing to do for kernel threads, but 'regs' may be junk
|
|
|
|
* (e.g. idle task) so check the flags and bail early.
|
|
|
|
*/
|
|
|
|
if (unlikely(next->flags & PF_KTHREAD))
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If all CPUs implement the SSBS extension, then we just need to
|
|
|
|
* context-switch the PSTATE field.
|
|
|
|
*/
|
|
|
|
if (cpu_have_feature(cpu_feature(SSBS)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* If the mitigation is enabled, then we leave SSBS clear. */
|
|
|
|
if ((arm64_get_ssbd_state() == ARM64_SSBD_FORCE_ENABLE) ||
|
|
|
|
test_tsk_thread_flag(next, TIF_SSBD))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (compat_user_mode(regs))
|
|
|
|
set_compat_ssbs_bit(regs);
|
|
|
|
else if (user_mode(regs))
|
|
|
|
set_ssbs_bit(regs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We store our current task in sp_el0, which is clobbered by userspace. Keep a
|
|
|
|
* shadow copy so that we can restore this upon entry from userspace.
|
|
|
|
*
|
|
|
|
* This is *only* for exception entry from EL0, and is not valid until we
|
|
|
|
* __switch_to() a user task.
|
|
|
|
*/
|
|
|
|
DEFINE_PER_CPU(struct task_struct *, __entry_task);
|
|
|
|
|
|
|
|
static void entry_task_switch(struct task_struct *next)
|
|
|
|
{
|
|
|
|
__this_cpu_write(__entry_task, next);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Thread switching.
|
|
|
|
*/
|
|
|
|
__notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
|
|
|
|
struct task_struct *next)
|
|
|
|
{
|
|
|
|
struct task_struct *last;
|
|
|
|
|
|
|
|
fpsimd_thread_switch(next);
|
|
|
|
tls_thread_switch(next);
|
|
|
|
hw_breakpoint_thread_switch(next);
|
|
|
|
contextidr_thread_switch(next);
|
|
|
|
entry_task_switch(next);
|
|
|
|
uao_thread_switch(next);
|
|
|
|
ssbs_thread_switch(next);
|
|
|
|
scs_overflow_check(next);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Complete any pending TLB or cache maintenance on this CPU in case
|
|
|
|
* the thread migrates to a different CPU.
|
|
|
|
* This full barrier is also required by the membarrier system
|
|
|
|
* call.
|
|
|
|
*/
|
|
|
|
dsb(ish);
|
|
|
|
|
|
|
|
/* the actual thread switch */
|
|
|
|
last = cpu_switch_to(prev, next);
|
|
|
|
|
|
|
|
return last;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long get_wchan(struct task_struct *p)
|
|
|
|
{
|
|
|
|
struct stackframe frame;
|
|
|
|
unsigned long stack_page, ret = 0;
|
|
|
|
int count = 0;
|
|
|
|
if (!p || p == current || p->state == TASK_RUNNING)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
stack_page = (unsigned long)try_get_task_stack(p);
|
|
|
|
if (!stack_page)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
frame.fp = thread_saved_fp(p);
|
|
|
|
frame.pc = thread_saved_pc(p);
|
|
|
|
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
|
|
|
frame.graph = p->curr_ret_stack;
|
|
|
|
#endif
|
|
|
|
do {
|
|
|
|
if (unwind_frame(p, &frame))
|
|
|
|
goto out;
|
|
|
|
if (!in_sched_functions(frame.pc)) {
|
|
|
|
ret = frame.pc;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
} while (count ++ < 16);
|
|
|
|
|
|
|
|
out:
|
|
|
|
put_task_stack(p);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long arch_align_stack(unsigned long sp)
|
|
|
|
{
|
|
|
|
if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
|
|
|
|
sp -= get_random_int() & ~PAGE_MASK;
|
|
|
|
return sp & ~0xf;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long arch_randomize_brk(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
if (is_compat_task())
|
|
|
|
return randomize_page(mm->brk, SZ_32M);
|
|
|
|
else
|
|
|
|
return randomize_page(mm->brk, SZ_1G);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called from setup_new_exec() after (COMPAT_)SET_PERSONALITY.
|
|
|
|
*/
|
|
|
|
void arch_setup_new_exec(void)
|
|
|
|
{
|
|
|
|
current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
|
|
|
|
void __used stackleak_check_alloca(unsigned long size)
|
|
|
|
{
|
|
|
|
unsigned long stack_left;
|
|
|
|
unsigned long current_sp = current_stack_pointer;
|
|
|
|
struct stack_info info;
|
|
|
|
|
|
|
|
BUG_ON(!on_accessible_stack(current, current_sp, &info));
|
|
|
|
|
|
|
|
stack_left = current_sp - info.low;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* There's a good chance we're almost out of stack space if this
|
|
|
|
* is true. Using panic() over BUG() is more likely to give
|
|
|
|
* reliable debugging output.
|
|
|
|
*/
|
|
|
|
if (size >= stack_left)
|
|
|
|
panic("alloca() over the kernel stack boundary\n");
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(stackleak_check_alloca);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
|
|
|
|
/*
|
|
|
|
* Control the relaxed ABI allowing tagged user addresses into the kernel.
|
|
|
|
*/
|
|
|
|
static unsigned int tagged_addr_disabled;
|
|
|
|
|
|
|
|
long set_tagged_addr_ctrl(unsigned long arg)
|
|
|
|
{
|
|
|
|
if (is_compat_task())
|
|
|
|
return -EINVAL;
|
|
|
|
if (arg & ~PR_TAGGED_ADDR_ENABLE)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Do not allow the enabling of the tagged address ABI if globally
|
|
|
|
* disabled via sysctl abi.tagged_addr_disabled.
|
|
|
|
*/
|
|
|
|
if (arg & PR_TAGGED_ADDR_ENABLE && tagged_addr_disabled)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
update_thread_flag(TIF_TAGGED_ADDR, arg & PR_TAGGED_ADDR_ENABLE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
long get_tagged_addr_ctrl(void)
|
|
|
|
{
|
|
|
|
if (is_compat_task())
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (test_thread_flag(TIF_TAGGED_ADDR))
|
|
|
|
return PR_TAGGED_ADDR_ENABLE;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Global sysctl to disable the tagged user addresses support. This control
|
|
|
|
* only prevents the tagged address ABI enabling via prctl() and does not
|
|
|
|
* disable it for tasks that already opted in to the relaxed ABI.
|
|
|
|
*/
|
|
|
|
static int zero;
|
|
|
|
static int one = 1;
|
|
|
|
|
|
|
|
static struct ctl_table tagged_addr_sysctl_table[] = {
|
|
|
|
{
|
|
|
|
.procname = "tagged_addr_disabled",
|
|
|
|
.mode = 0644,
|
|
|
|
.data = &tagged_addr_disabled,
|
|
|
|
.maxlen = sizeof(int),
|
|
|
|
.proc_handler = proc_dointvec_minmax,
|
|
|
|
.extra1 = &zero,
|
|
|
|
.extra2 = &one,
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init tagged_addr_init(void)
|
|
|
|
{
|
|
|
|
if (!register_sysctl("abi", tagged_addr_sysctl_table))
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
core_initcall(tagged_addr_init);
|
|
|
|
#endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */
|