456 lines
13 KiB
C
456 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef LINUX_B43_PHY_COMMON_H_
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#define LINUX_B43_PHY_COMMON_H_
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#include <linux/types.h>
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#include <linux/nl80211.h>
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struct b43_wldev;
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/* Complex number using 2 32-bit signed integers */
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struct b43_c32 { s32 i, q; };
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#define CORDIC_CONVERT(value) (((value) >= 0) ? \
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((((value) >> 15) + 1) >> 1) : \
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-((((-(value)) >> 15) + 1) >> 1))
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/* PHY register routing bits */
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#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
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#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
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#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
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#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
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#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
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/* CCK (B-PHY) registers. */
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#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
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/* N-PHY registers. */
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#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
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/* N-PHY BMODE registers. */
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#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
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/* OFDM (A-PHY) registers. */
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#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
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/* Extended G-PHY registers. */
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#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
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/* Masks for the PHY versioning registers. */
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#define B43_PHYVER_ANALOG 0xF000
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#define B43_PHYVER_ANALOG_SHIFT 12
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#define B43_PHYVER_TYPE 0x0F00
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#define B43_PHYVER_TYPE_SHIFT 8
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#define B43_PHYVER_VERSION 0x00FF
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/* PHY writes need to be flushed if we reach limit */
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#define B43_MAX_WRITES_IN_ROW 24
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/**
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* enum b43_interference_mitigation - Interference Mitigation mode
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*
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* @B43_INTERFMODE_NONE: Disabled
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* @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
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* @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
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* @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
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*/
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enum b43_interference_mitigation {
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B43_INTERFMODE_NONE,
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B43_INTERFMODE_NONWLAN,
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B43_INTERFMODE_MANUALWLAN,
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B43_INTERFMODE_AUTOWLAN,
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};
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/* Antenna identifiers */
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enum {
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B43_ANTENNA0 = 0, /* Antenna 0 */
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B43_ANTENNA1 = 1, /* Antenna 1 */
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B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
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B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
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B43_ANTENNA2 = 4,
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B43_ANTENNA3 = 8,
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B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
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B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
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};
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/**
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* enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
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*
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* @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
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* @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
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*/
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enum b43_txpwr_result {
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B43_TXPWR_RES_NEED_ADJUST,
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B43_TXPWR_RES_DONE,
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};
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/**
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* struct b43_phy_operations - Function pointers for PHY ops.
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*
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* @allocate: Allocate and initialise the PHY data structures.
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* Must not be NULL.
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* @free: Destroy and free the PHY data structures.
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* Must not be NULL.
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*
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* @prepare_structs: Prepare the PHY data structures.
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* The data structures allocated in @allocate are
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* initialized here.
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* Must not be NULL.
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* @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
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* do some early early PHY hardware init.
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* Can be NULL, if not required.
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* @init: Initialize the PHY.
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* Must not be NULL.
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* @exit: Shutdown the PHY.
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* Can be NULL, if not required.
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*
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* @phy_read: Read from a PHY register.
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* Must not be NULL.
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* @phy_write: Write to a PHY register.
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* Must not be NULL.
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* @phy_maskset: Maskset a PHY register, taking shortcuts.
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* If it is NULL, a generic algorithm is used.
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* @radio_read: Read from a Radio register.
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* Must not be NULL.
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* @radio_write: Write to a Radio register.
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* Must not be NULL.
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*
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* @supports_hwpctl: Returns a boolean whether Hardware Power Control
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* is supported or not.
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* If NULL, hwpctl is assumed to be never supported.
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* @software_rfkill: Turn the radio ON or OFF.
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* Possible state values are
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* RFKILL_STATE_SOFT_BLOCKED or
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* RFKILL_STATE_UNBLOCKED
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* Must not be NULL.
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* @switch_analog: Turn the Analog on/off.
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* Must not be NULL.
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* @switch_channel: Switch the radio to another channel.
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* Must not be NULL.
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* @get_default_chan: Just returns the default channel number.
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* Must not be NULL.
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* @set_rx_antenna: Set the antenna used for RX.
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* Can be NULL, if not supported.
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* @interf_mitigation: Switch the Interference Mitigation mode.
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* Can be NULL, if not supported.
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*
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* @recalc_txpower: Recalculate the transmission power parameters.
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* This callback has to recalculate the TX power settings,
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* but does not need to write them to the hardware, yet.
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* Returns enum b43_txpwr_result to indicate whether the hardware
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* needs to be adjusted.
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* If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
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* will be called later.
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* If the parameter "ignore_tssi" is true, the TSSI values should
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* be ignored and a recalculation of the power settings should be
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* done even if the TSSI values did not change.
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* This function may sleep, but should not.
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* Must not be NULL.
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* @adjust_txpower: Write the previously calculated TX power settings
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* (from @recalc_txpower) to the hardware.
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* This function may sleep.
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* Can be NULL, if (and ONLY if) @recalc_txpower _always_
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* returns B43_TXPWR_RES_DONE.
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*
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* @pwork_15sec: Periodic work. Called every 15 seconds.
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* Can be NULL, if not required.
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* @pwork_60sec: Periodic work. Called every 60 seconds.
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* Can be NULL, if not required.
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*/
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struct b43_phy_operations {
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/* Initialisation */
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int (*allocate)(struct b43_wldev *dev);
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void (*free)(struct b43_wldev *dev);
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void (*prepare_structs)(struct b43_wldev *dev);
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int (*prepare_hardware)(struct b43_wldev *dev);
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int (*init)(struct b43_wldev *dev);
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void (*exit)(struct b43_wldev *dev);
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/* Register access */
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u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
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void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
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void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
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u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
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void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
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/* Radio */
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bool (*supports_hwpctl)(struct b43_wldev *dev);
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void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
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void (*switch_analog)(struct b43_wldev *dev, bool on);
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int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
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unsigned int (*get_default_chan)(struct b43_wldev *dev);
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void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
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int (*interf_mitigation)(struct b43_wldev *dev,
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enum b43_interference_mitigation new_mode);
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/* Transmission power adjustment */
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enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
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bool ignore_tssi);
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void (*adjust_txpower)(struct b43_wldev *dev);
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/* Misc */
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void (*pwork_15sec)(struct b43_wldev *dev);
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void (*pwork_60sec)(struct b43_wldev *dev);
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};
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struct b43_phy_g;
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struct b43_phy_n;
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struct b43_phy_lp;
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struct b43_phy_ht;
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struct b43_phy_lcn;
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struct b43_phy {
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/* Hardware operation callbacks. */
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const struct b43_phy_operations *ops;
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/* Most hardware context information is stored in the standard-
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* specific data structures pointed to by the pointers below.
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* Only one of them is valid (the currently enabled PHY). */
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#ifdef CONFIG_B43_DEBUG
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/* No union for debug build to force NULL derefs in buggy code. */
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struct {
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#else
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union {
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#endif
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/* G-PHY specific information */
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struct b43_phy_g *g;
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/* N-PHY specific information */
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struct b43_phy_n *n;
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/* LP-PHY specific information */
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struct b43_phy_lp *lp;
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/* HT-PHY specific information */
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struct b43_phy_ht *ht;
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/* LCN-PHY specific information */
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struct b43_phy_lcn *lcn;
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/* AC-PHY specific information */
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struct b43_phy_ac *ac;
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};
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/* Band support flags. */
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bool supports_2ghz;
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bool supports_5ghz;
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/* Is GMODE (2 GHz mode) bit enabled? */
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bool gmode;
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/* After power reset full init has to be performed */
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bool do_full_init;
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/* Analog Type */
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u8 analog;
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/* B43_PHYTYPE_ */
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u8 type;
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/* PHY revision number. */
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u8 rev;
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/* Count writes since last read */
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u8 writes_counter;
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/* Radio versioning */
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u16 radio_manuf; /* Radio manufacturer */
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u16 radio_ver; /* Radio version */
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u8 radio_rev; /* Radio revision */
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/* Software state of the radio */
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bool radio_on;
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/* Desired TX power level (in dBm).
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* This is set by the user and adjusted in b43_phy_xmitpower(). */
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int desired_txpower;
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/* Hardware Power Control enabled? */
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bool hardware_power_control;
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/* The time (in absolute jiffies) when the next TX power output
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* check is needed. */
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unsigned long next_txpwr_check_time;
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/* Current channel */
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struct cfg80211_chan_def *chandef;
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unsigned int channel;
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/* PHY TX errors counter. */
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atomic_t txerr_cnt;
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#ifdef CONFIG_B43_DEBUG
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/* PHY registers locked (w.r.t. firmware) */
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bool phy_locked;
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/* Radio registers locked (w.r.t. firmware) */
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bool radio_locked;
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#endif /* B43_DEBUG */
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};
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/**
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* b43_phy_allocate - Allocate PHY structs
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* Allocate the PHY data structures, based on the current dev->phy.type
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*/
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int b43_phy_allocate(struct b43_wldev *dev);
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/**
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* b43_phy_free - Free PHY structs
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*/
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void b43_phy_free(struct b43_wldev *dev);
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/**
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* b43_phy_init - Initialise the PHY
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*/
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int b43_phy_init(struct b43_wldev *dev);
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/**
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* b43_phy_exit - Cleanup PHY
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*/
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void b43_phy_exit(struct b43_wldev *dev);
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/**
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* b43_has_hardware_pctl - Hardware Power Control supported?
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* Returns a boolean, whether hardware power control is supported.
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*/
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bool b43_has_hardware_pctl(struct b43_wldev *dev);
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/**
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* b43_phy_read - 16bit PHY register read access
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*/
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u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
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/**
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* b43_phy_write - 16bit PHY register write access
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*/
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void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
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/**
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* b43_phy_copy - copy contents of 16bit PHY register to another
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*/
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void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
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/**
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* b43_phy_mask - Mask a PHY register with a mask
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*/
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void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
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/**
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* b43_phy_set - OR a PHY register with a bitmap
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*/
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void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
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/**
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* b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
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*/
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void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
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/**
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* b43_radio_read - 16bit Radio register read access
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*/
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u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
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#define b43_radio_read16 b43_radio_read /* DEPRECATED */
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/**
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* b43_radio_write - 16bit Radio register write access
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*/
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void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
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#define b43_radio_write16 b43_radio_write /* DEPRECATED */
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|
||
|
|
/**
|
||
|
|
* b43_radio_mask - Mask a 16bit radio register with a mask
|
||
|
|
*/
|
||
|
|
void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_radio_set - OR a 16bit radio register with a bitmap
|
||
|
|
*/
|
||
|
|
void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
|
||
|
|
*/
|
||
|
|
void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_radio_wait_value - Waits for a given value in masked register read
|
||
|
|
*/
|
||
|
|
bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask,
|
||
|
|
u16 value, int delay, int timeout);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_radio_lock - Lock firmware radio register access
|
||
|
|
*/
|
||
|
|
void b43_radio_lock(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_radio_unlock - Unlock firmware radio register access
|
||
|
|
*/
|
||
|
|
void b43_radio_unlock(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_phy_lock - Lock firmware PHY register access
|
||
|
|
*/
|
||
|
|
void b43_phy_lock(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_phy_unlock - Unlock firmware PHY register access
|
||
|
|
*/
|
||
|
|
void b43_phy_unlock(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
void b43_phy_put_into_reset(struct b43_wldev *dev);
|
||
|
|
void b43_phy_take_out_of_reset(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_switch_channel - Switch to another channel
|
||
|
|
*/
|
||
|
|
int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_software_rfkill - Turn the radio ON or OFF in software.
|
||
|
|
*/
|
||
|
|
void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_phy_txpower_check - Check TX power output.
|
||
|
|
*
|
||
|
|
* Compare the current TX power output to the desired power emission
|
||
|
|
* and schedule an adjustment in case it mismatches.
|
||
|
|
*
|
||
|
|
* @flags: OR'ed enum b43_phy_txpower_check_flags flags.
|
||
|
|
* See the docs below.
|
||
|
|
*/
|
||
|
|
void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
|
||
|
|
/**
|
||
|
|
* enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
|
||
|
|
*
|
||
|
|
* @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
|
||
|
|
* the check now.
|
||
|
|
* @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
|
||
|
|
* TSSI did not change.
|
||
|
|
*/
|
||
|
|
enum b43_phy_txpower_check_flags {
|
||
|
|
B43_TXPWR_IGNORE_TIME = (1 << 0),
|
||
|
|
B43_TXPWR_IGNORE_TSSI = (1 << 1),
|
||
|
|
};
|
||
|
|
|
||
|
|
struct work_struct;
|
||
|
|
void b43_phy_txpower_adjust_work(struct work_struct *work);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
|
||
|
|
*
|
||
|
|
* @shm_offset: The SHM address to read the values from.
|
||
|
|
*
|
||
|
|
* Returns the average of the 4 TSSI values, or a negative error code.
|
||
|
|
*/
|
||
|
|
int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
|
||
|
|
*
|
||
|
|
* It does the switching based on the PHY0 core register.
|
||
|
|
* Do _not_ call this directly. Only use it as a switch_analog callback
|
||
|
|
* for struct b43_phy_operations.
|
||
|
|
*/
|
||
|
|
void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
|
||
|
|
|
||
|
|
bool b43_is_40mhz(struct b43_wldev *dev);
|
||
|
|
|
||
|
|
void b43_phy_force_clock(struct b43_wldev *dev, bool force);
|
||
|
|
|
||
|
|
struct b43_c32 b43_cordic(int theta);
|
||
|
|
|
||
|
|
#endif /* LINUX_B43_PHY_COMMON_H_ */
|