47 lines
1.7 KiB
Plaintext
47 lines
1.7 KiB
Plaintext
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Xilinx plb/axi GPIO controller
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Dual channel GPIO controller with configurable number of pins
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(from 1 to 32 per channel). Every pin can be configured as
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input/output/tristate. Both channels share the same global IRQ but
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local interrupts can be enabled on channel basis.
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Required properties:
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- compatible : Should be "xlnx,xps-gpio-1.00.a"
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- reg : Address and length of the register set for the device
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters (currently unused).
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- gpio-controller : Marks the device node as a GPIO controller.
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Optional properties:
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- interrupts : Interrupt mapping for GPIO IRQ.
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- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
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- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
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- xlnx,gpio-width : gpio width
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- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
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- xlnx,is-dual : if 1, controller also uses the second channel
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- xlnx,all-inputs-2 : as above but for the second channel
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- xlnx,dout-default-2 : as above but the second channel
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- xlnx,gpio2-width : as above but for the second channel
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- xlnx,tri-default-2 : as above but for the second channel
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Example:
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gpio: gpio@40000000 {
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#gpio-cells = <2>;
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compatible = "xlnx,xps-gpio-1.00.a";
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gpio-controller ;
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interrupt-parent = <µblaze_0_intc>;
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interrupts = < 6 2 >;
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reg = < 0x40000000 0x10000 >;
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xlnx,all-inputs = <0x0>;
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xlnx,all-inputs-2 = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,dout-default-2 = <0x0>;
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xlnx,gpio-width = <0x2>;
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xlnx,gpio2-width = <0x2>;
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xlnx,interrupt-present = <0x1>;
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xlnx,is-dual = <0x1>;
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xlnx,tri-default = <0xffffffff>;
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xlnx,tri-default-2 = <0xffffffff>;
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} ;
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