82 lines
2.5 KiB
Plaintext
82 lines
2.5 KiB
Plaintext
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* Freescale 85xx RAID Engine nodes
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RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
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Engine should have a separate node.
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Supported chips:
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P5020, P5040
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Required properties:
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- compatible: Should contain "fsl,raideng-v1.0" as the value
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This identifies RAID Engine block. 1 in 1.0 represents
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major number whereas 0 represents minor number. The
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version matches the hardware IP version.
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- reg: offset and length of the register set for the device
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- ranges: standard ranges property specifying the translation
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between child address space and parent address space
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Example:
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/* P5020 */
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raideng: raideng@320000 {
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compatible = "fsl,raideng-v1.0";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x320000 0x10000>;
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ranges = <0 0x320000 0x10000>;
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};
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There must be a sub-node for each job queue present in RAID Engine
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This node must be a sub-node of the main RAID Engine node
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- compatible: Should contain "fsl,raideng-v1.0-job-queue" as the value
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This identifies the job queue interface
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- reg: offset and length of the register set for job queue
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- ranges: standard ranges property specifying the translation
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between child address space and parent address space
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Example:
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/* P5020 */
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raideng_jq0@1000 {
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compatible = "fsl,raideng-v1.0-job-queue";
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reg = <0x1000 0x1000>;
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ranges = <0x0 0x1000 0x1000>;
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};
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There must be a sub-node for each job ring present in RAID Engine
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This node must be a sub-node of job queue node
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- compatible: Must contain "fsl,raideng-v1.0-job-ring" as the value
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This identifies job ring. Should contain either
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"fsl,raideng-v1.0-hp-ring" or "fsl,raideng-v1.0-lp-ring"
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depending upon whether ring has high or low priority
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- reg: offset and length of the register set for job ring
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- interrupts: interrupt mapping for job ring IRQ
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Optional property:
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- fsl,liodn: Specifies the LIODN to be used for Job Ring. This
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property is normally set by firmware. Value
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is of 12-bits which is the LIODN number for this JR.
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This property is used by the IOMMU (PAMU) to distinquish
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transactions from this JR and than be able to do address
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translation & protection accordingly.
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Example:
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/* P5020 */
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raideng_jq0@1000 {
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compatible = "fsl,raideng-v1.0-job-queue";
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reg = <0x1000 0x1000>;
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ranges = <0x0 0x1000 0x1000>;
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raideng_jr0: jr@0 {
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compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
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reg = <0x0 0x400>;
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interrupts = <139 2 0 0>;
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interrupt-parent = <&mpic>;
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fsl,liodn = <0x41>;
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};
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};
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