68 lines
2.3 KiB
Plaintext
68 lines
2.3 KiB
Plaintext
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NVIDIA Tegra audio complex, with RT5677 CODEC
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Required properties:
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- compatible : "nvidia,tegra-audio-rt5677"
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries:
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- pll_a
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- pll_a_out0
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- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
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- nvidia,model : The user-visible name of this sound complex.
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- nvidia,audio-routing : A list of the connections between audio components.
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Each entry is a pair of strings, the first being the connection's sink,
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the second being the connection's source. Valid names for sources and
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sinks are the RT5677's pins (as documented in its binding), and the jacks
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on the board:
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* Headphone
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* Speaker
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* Headset Mic
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* Internal Mic 1
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* Internal Mic 2
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- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
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connected to the CODEC.
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- nvidia,audio-codec : The phandle of the RT5677 audio codec. This binding
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assumes that AIF1 on the CODEC is connected to Tegra.
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Optional properties:
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- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in
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- nvidia,hp-en-gpios : The GPIO that enables headphone amplifier
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- nvidia,mic-present-gpios: The GPIO that mic jack is plugged in
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- nvidia,dmic-clk-en-gpios : The GPIO that gates DMIC clock signal
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Example:
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sound {
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compatible = "nvidia,tegra-audio-rt5677-ryu",
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"nvidia,tegra-audio-rt5677";
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nvidia,model = "NVIDIA Tegra Ryu";
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nvidia,audio-routing =
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"Headphone", "LOUT2",
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"Headphone", "LOUT1",
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"Headset Mic", "MICBIAS1",
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"IN1P", "Headset Mic",
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"IN1N", "Headset Mic",
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"DMIC L1", "Internal Mic 1",
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"DMIC R1", "Internal Mic 1",
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"DMIC L2", "Internal Mic 2",
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"DMIC R2", "Internal Mic 2",
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"Speaker", "PDM1L",
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"Speaker", "PDM1R";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&rt5677>;
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nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
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nvidia,mic-present-gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
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nvidia,hp-en-gpios = <&rt5677 1 GPIO_ACTIVE_HIGH>;
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nvidia,dmic-clk-en-gpios = <&rt5677 2 GPIO_ACTIVE_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
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<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA124_CLK_EXTERN1>;
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clock-names = "pll_a", "pll_a_out0", "mclk";
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};
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