33 lines
1 KiB
Plaintext
33 lines
1 KiB
Plaintext
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Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
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Required properties:
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- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
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"jaguar2"
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- reg : The register base for the controller. For "mscc,<soc>-spi", a second
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register set is required (named ICPU_CFG:SPI_MST)
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- interrupts : One interrupt, used by the controller.
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- #address-cells : <1>, as required by generic SPI binding.
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- #size-cells : <0>, also as required by generic SPI binding.
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Optional properties:
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- cs-gpios : Specifies the gpio pis to be used for chipselects.
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- num-cs : The number of chipselects. If omitted, this will default to 4.
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- reg-io-width : The I/O register width (in bytes) implemented by this
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device. Supported values are 2 or 4 (the default).
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Child nodes as per the generic SPI binding.
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Example:
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spi@fff00000 {
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compatible = "snps,dw-apb-ssi";
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reg = <0xfff00000 0x1000>;
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interrupts = <0 154 4>;
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#address-cells = <1>;
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#size-cells = <0>;
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num-cs = <2>;
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cs-gpios = <&gpio0 13 0>,
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<&gpio0 14 0>;
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};
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