103 lines
2.1 KiB
Plaintext
103 lines
2.1 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Veyron Brain Rev 0 board device tree source
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*
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* Copyright 2014 Google, Inc
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*/
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/dts-v1/;
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#include "rk3288-veyron.dtsi"
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/ {
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model = "Google Brain";
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compatible = "google,veyron-brain-rev0", "google,veyron-brain",
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"google,veyron", "rockchip,rk3288";
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vcc33_sys: vcc33-sys {
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vin-supply = <&vcc_5v>;
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};
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vcc33_io: vcc33_io {
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compatible = "regulator-fixed";
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regulator-name = "vcc33_io";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc33_sys>;
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/* This is gated by vcc_18 too */
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};
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/* This turns on vbus for host2 and otg (dwc2) */
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vcc5_host2: vcc5-host2-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb2_pwr_en>;
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regulator-name = "vcc5_host2";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&pinctrl {
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hdmi {
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vcc50_hdmi_en: vcc50-hdmi-en {
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rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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usb-host {
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usb2_pwr_en: usb2-pwr-en {
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rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&rk808 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
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dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>,
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<&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
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/delete-property/ vcc6-supply;
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regulators {
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/* vcc33_io is sourced directly from vcc33_sys */
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/delete-node/ LDO_REG1;
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/* This is not a pwren anymore, but the real power supply */
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vdd10_lcd: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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regulator-suspend-mem-disabled;
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};
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vcc18_hdmi: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc18_hdmi";
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regulator-suspend-mem-disabled;
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};
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};
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc50_hdmi_en>;
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};
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