454 lines
11 KiB
C
454 lines
11 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _SPARC_PGTABLE_H
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#define _SPARC_PGTABLE_H
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/* asm/pgtable.h: Defines and functions used to work
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* with Sparc page tables.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/const.h>
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#ifndef __ASSEMBLY__
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#include <asm-generic/4level-fixup.h>
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#include <linux/spinlock.h>
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#include <linux/mm_types.h>
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#include <asm/types.h>
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#include <asm/pgtsrmmu.h>
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#include <asm/vaddrs.h>
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#include <asm/oplib.h>
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#include <asm/cpu_type.h>
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struct vm_area_struct;
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struct page;
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void load_mmu(void);
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unsigned long calc_highpages(void);
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unsigned long __init bootmem_init(unsigned long *pages_avail);
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#define pte_ERROR(e) __builtin_trap()
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#define pmd_ERROR(e) __builtin_trap()
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#define pgd_ERROR(e) __builtin_trap()
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#define PMD_SHIFT 22
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK)
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#define PGDIR_SHIFT SRMMU_PGDIR_SHIFT
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#define PGDIR_SIZE SRMMU_PGDIR_SIZE
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#define PGDIR_MASK SRMMU_PGDIR_MASK
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#define PTRS_PER_PTE 1024
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#define PTRS_PER_PMD SRMMU_PTRS_PER_PMD
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#define PTRS_PER_PGD SRMMU_PTRS_PER_PGD
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#define USER_PTRS_PER_PGD PAGE_OFFSET / SRMMU_PGDIR_SIZE
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#define FIRST_USER_ADDRESS 0UL
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#define PTE_SIZE (PTRS_PER_PTE*4)
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#define PAGE_NONE SRMMU_PAGE_NONE
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#define PAGE_SHARED SRMMU_PAGE_SHARED
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#define PAGE_COPY SRMMU_PAGE_COPY
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#define PAGE_READONLY SRMMU_PAGE_RDONLY
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#define PAGE_KERNEL SRMMU_PAGE_KERNEL
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/* Top-level page directory - dummy used by init-mm.
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* srmmu.c will assign the real one (which is dynamically sized) */
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#define swapper_pg_dir NULL
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void paging_init(void);
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extern unsigned long ptr_in_current_pgd;
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/* xwr */
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY
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#define __P101 PAGE_READONLY
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#define __P110 PAGE_COPY
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#define __P111 PAGE_COPY
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY
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#define __S101 PAGE_READONLY
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#define __S110 PAGE_SHARED
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#define __S111 PAGE_SHARED
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/* First physical page can be anywhere, the following is needed so that
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* va-->pa and vice versa conversions work properly without performance
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* hit for all __pa()/__va() operations.
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*/
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extern unsigned long phys_base;
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extern unsigned long pfn_base;
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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/*
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* In general all page table modifications should use the V8 atomic
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* swap instruction. This insures the mmu and the cpu are in sync
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* with respect to ref/mod bits in the page tables.
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*/
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static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)
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{
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__asm__ __volatile__("swap [%2], %0" :
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"=&r" (value) : "0" (value), "r" (addr) : "memory");
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return value;
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}
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/* Certain architectures need to do special things when pte's
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* within a page table are directly modified. Thus, the following
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* hook is made available.
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*/
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static inline void set_pte(pte_t *ptep, pte_t pteval)
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{
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srmmu_swap((unsigned long *)ptep, pte_val(pteval));
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}
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#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
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static inline int srmmu_device_memory(unsigned long x)
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{
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return ((x & 0xF0000000) != 0);
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}
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static inline struct page *pmd_page(pmd_t pmd)
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{
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if (srmmu_device_memory(pmd_val(pmd)))
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BUG();
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return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4));
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}
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static inline unsigned long pgd_page_vaddr(pgd_t pgd)
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{
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if (srmmu_device_memory(pgd_val(pgd))) {
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return ~0;
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} else {
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unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK;
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return (unsigned long)__nocache_va(v << 4);
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}
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}
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static inline int pte_present(pte_t pte)
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{
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return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE);
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}
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static inline int pte_none(pte_t pte)
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{
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return !pte_val(pte);
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}
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static inline void __pte_clear(pte_t *ptep)
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{
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set_pte(ptep, __pte(0));
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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__pte_clear(ptep);
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}
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static inline int pmd_bad(pmd_t pmd)
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{
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return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
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}
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static inline int pmd_present(pmd_t pmd)
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{
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return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
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}
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static inline int pmd_none(pmd_t pmd)
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{
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return !pmd_val(pmd);
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}
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static inline void pmd_clear(pmd_t *pmdp)
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{
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int i;
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for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)
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set_pte((pte_t *)&pmdp->pmdv[i], __pte(0));
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}
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static inline int pgd_none(pgd_t pgd)
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{
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return !(pgd_val(pgd) & 0xFFFFFFF);
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}
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static inline int pgd_bad(pgd_t pgd)
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{
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return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
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}
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static inline int pgd_present(pgd_t pgd)
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{
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return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
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}
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static inline void pgd_clear(pgd_t *pgdp)
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{
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set_pte((pte_t *)pgdp, __pte(0));
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}
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_write(pte_t pte)
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{
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return pte_val(pte) & SRMMU_WRITE;
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}
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static inline int pte_dirty(pte_t pte)
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{
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return pte_val(pte) & SRMMU_DIRTY;
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}
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static inline int pte_young(pte_t pte)
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{
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return pte_val(pte) & SRMMU_REF;
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}
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static inline int pte_special(pte_t pte)
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{
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return 0;
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}
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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return __pte(pte_val(pte) & ~SRMMU_WRITE);
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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return __pte(pte_val(pte) & ~SRMMU_DIRTY);
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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return __pte(pte_val(pte) & ~SRMMU_REF);
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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return __pte(pte_val(pte) | SRMMU_WRITE);
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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return __pte(pte_val(pte) | SRMMU_DIRTY);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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return __pte(pte_val(pte) | SRMMU_REF);
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}
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#define pte_mkspecial(pte) (pte)
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#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot)
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static inline unsigned long pte_pfn(pte_t pte)
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{
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if (srmmu_device_memory(pte_val(pte))) {
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/* Just return something that will cause
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* pfn_valid() to return false. This makes
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* copy_one_pte() to just directly copy to
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* PTE over.
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*/
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return ~0UL;
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}
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return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);
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}
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#define pte_page(pte) pfn_to_page(pte_pfn(pte))
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
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{
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return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot));
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}
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static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot)
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{
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return __pte(((page) >> 4) | pgprot_val(pgprot));
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}
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static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)
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{
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return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot));
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}
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t prot)
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{
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pgprot_val(prot) &= ~pgprot_val(__pgprot(SRMMU_CACHE));
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return prot;
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}
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static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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return __pte((pte_val(pte) & SRMMU_CHG_MASK) |
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pgprot_val(newprot));
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}
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#define pgd_index(address) ((address) >> PGDIR_SHIFT)
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/* to find an entry in a page-table-directory */
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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/* to find an entry in a kernel page-table-directory */
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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/* Find an entry in the second-level page table.. */
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static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
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{
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return (pmd_t *) pgd_page_vaddr(*dir) +
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((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
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}
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/* Find an entry in the third-level page table.. */
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pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address);
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/*
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* This shortcut works on sun4m (and sun4d) because the nocache area is static.
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*/
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#define pte_offset_map(d, a) pte_offset_kernel(d,a)
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#define pte_unmap(pte) do{}while(0)
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struct seq_file;
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void mmu_info(struct seq_file *m);
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/* Fault handler stuff... */
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#define FAULT_CODE_PROT 0x1
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#define FAULT_CODE_WRITE 0x2
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#define FAULT_CODE_USER 0x4
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#define update_mmu_cache(vma, address, ptep) do { } while (0)
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void srmmu_mapiorange(unsigned int bus, unsigned long xpa,
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unsigned long xva, unsigned int len);
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void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);
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/* Encode and de-code a swap entry */
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static inline unsigned long __swp_type(swp_entry_t entry)
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{
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return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK;
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}
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static inline unsigned long __swp_offset(swp_entry_t entry)
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{
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return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK;
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}
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static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
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{
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return (swp_entry_t) {
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(type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT
|
||
|
|
| (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT };
|
||
|
|
}
|
||
|
|
|
||
|
|
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
||
|
|
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
|
||
|
|
|
||
|
|
static inline unsigned long
|
||
|
|
__get_phys (unsigned long addr)
|
||
|
|
{
|
||
|
|
switch (sparc_cpu_model){
|
||
|
|
case sun4m:
|
||
|
|
case sun4d:
|
||
|
|
return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
|
||
|
|
default:
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline int
|
||
|
|
__get_iospace (unsigned long addr)
|
||
|
|
{
|
||
|
|
switch (sparc_cpu_model){
|
||
|
|
case sun4m:
|
||
|
|
case sun4d:
|
||
|
|
return (srmmu_get_pte (addr) >> 28);
|
||
|
|
default:
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
extern unsigned long *sparc_valid_addr_bitmap;
|
||
|
|
|
||
|
|
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
|
||
|
|
#define kern_addr_valid(addr) \
|
||
|
|
(test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
|
||
|
|
|
||
|
|
/*
|
||
|
|
* For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
|
||
|
|
* its high 4 bits. These macros/functions put it there or get it from there.
|
||
|
|
*/
|
||
|
|
#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
|
||
|
|
#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
|
||
|
|
#define GET_PFN(pfn) (pfn & 0x0fffffffUL)
|
||
|
|
|
||
|
|
int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
|
||
|
|
unsigned long, pgprot_t);
|
||
|
|
|
||
|
|
static inline int io_remap_pfn_range(struct vm_area_struct *vma,
|
||
|
|
unsigned long from, unsigned long pfn,
|
||
|
|
unsigned long size, pgprot_t prot)
|
||
|
|
{
|
||
|
|
unsigned long long offset, space, phys_base;
|
||
|
|
|
||
|
|
offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
|
||
|
|
space = GET_IOSPACE(pfn);
|
||
|
|
phys_base = offset | (space << 32ULL);
|
||
|
|
|
||
|
|
return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
|
||
|
|
}
|
||
|
|
#define io_remap_pfn_range io_remap_pfn_range
|
||
|
|
|
||
|
|
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
|
||
|
|
#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
|
||
|
|
({ \
|
||
|
|
int __changed = !pte_same(*(__ptep), __entry); \
|
||
|
|
if (__changed) { \
|
||
|
|
set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
|
||
|
|
flush_tlb_page(__vma, __address); \
|
||
|
|
} \
|
||
|
|
__changed; \
|
||
|
|
})
|
||
|
|
|
||
|
|
#include <asm-generic/pgtable.h>
|
||
|
|
|
||
|
|
#endif /* !(__ASSEMBLY__) */
|
||
|
|
|
||
|
|
#define VMALLOC_START _AC(0xfe600000,UL)
|
||
|
|
#define VMALLOC_END _AC(0xffc00000,UL)
|
||
|
|
|
||
|
|
/* We provide our own get_unmapped_area to cope with VA holes for userland */
|
||
|
|
#define HAVE_ARCH_UNMAPPED_AREA
|
||
|
|
|
||
|
|
/*
|
||
|
|
* No page table caches to initialise
|
||
|
|
*/
|
||
|
|
#define pgtable_cache_init() do { } while (0)
|
||
|
|
|
||
|
|
#endif /* !(_SPARC_PGTABLE_H) */
|