86 lines
5.8 KiB
C
86 lines
5.8 KiB
C
|
/* SPDX-License-Identifier: GPL-2.0 */
|
||
|
|
/*
|
||
|
|
* Copyright (c) 2019 MediaTek Inc.
|
||
|
|
*/
|
||
|
|
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000100, 0x08047250)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000108, 0x10107050)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000110, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000120, 0x08086050)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000130, 0x20207048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000138, 0x20207048)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000100, 0x10107244)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000108, 0x10107044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000110, 0x040a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000120, 0x08086048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000130, 0x20207044)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000138, 0x20207044)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x0000015c, 0x88410222)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000100, 0x08047250)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000108, 0x10107050)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000110, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000118, 0x0000f0d0)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000120, 0x08086050)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000124, 0x00000034)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000128, 0x0a0a50df)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000130, 0x20207048)
|
||
|
|
SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000138, 0x20207048)
|
||
|
|
SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
|