147 lines
5.1 KiB
C
147 lines
5.1 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2009-2014 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL8723BE__FW__H__
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#define __RTL8723BE__FW__H__
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#define FW_8192C_SIZE 0x8000
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#define FW_8192C_START_ADDRESS 0x1000
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#define FW_8192C_END_ADDRESS 0x5FFF
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#define FW_8192C_PAGE_SIZE 4096
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#define FW_8192C_POLLING_DELAY 5
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#define USE_OLD_WOWLAN_DEBUG_FW 0
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#define H2C_PWEMODE_LENGTH 7
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/* Fw PS state for RPWM.
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*BIT[2:0] = HW state
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*BIT[3] = Protocol PS state, 1: register active state , 0: register sleep state
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*BIT[4] = sub-state
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*/
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#define FW_PS_RF_ON BIT(2)
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#define FW_PS_REGISTER_ACTIVE BIT(3)
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#define FW_PS_ACK BIT(6)
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#define FW_PS_TOGGLE BIT(7)
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/* 8723BE RPWM value*/
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/* BIT[0] = 1: 32k, 0: 40M*/
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#define FW_PS_CLOCK_OFF BIT(0) /* 32k*/
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#define FW_PS_CLOCK_ON 0 /*40M*/
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#define FW_PS_STATE_MASK (0x0F)
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#define FW_PS_STATE_HW_MASK (0x07)
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/*ISR_ENABLE, IMR_ENABLE, and PS mode should be inherited.*/
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#define FW_PS_STATE_INT_MASK (0x3F)
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#define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x))
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/* ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))*/
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#define FW_PS_STATE_ALL_ON (FW_PS_CLOCK_ON)
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/* (FW_PS_RF_ON)*/
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#define FW_PS_STATE_RF_ON (FW_PS_CLOCK_ON)
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/* 0x0*/
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#define FW_PS_STATE_RF_OFF (FW_PS_CLOCK_ON)
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/* (FW_PS_STATE_RF_OFF)*/
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#define FW_PS_STATE_RF_OFF_LOW_PWR (FW_PS_CLOCK_OFF)
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/* For 8723BE H2C PwrMode Cmd ID 5.*/
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#define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
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#define FW_PWR_STATE_RF_OFF 0
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#define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK)
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#define IS_IN_LOW_POWER_STATE(__fwpsstate) \
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(FW_PS_STATE(__fwpsstate) == FW_PS_CLOCK_OFF)
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#define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
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#define FW_PWR_STATE_RF_OFF 0
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enum rtl8723b_h2c_cmd {
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H2C_8723B_RSVDPAGE = 0,
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H2C_8723B_MSRRPT = 1,
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H2C_8723B_SCAN = 2,
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H2C_8723B_KEEP_ALIVE_CTRL = 3,
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H2C_8723B_DISCONNECT_DECISION = 4,
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H2C_8723B_BCN_RSVDPAGE = 9,
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H2C_8723B_PROBERSP_RSVDPAGE = 10,
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H2C_8723B_SETPWRMODE = 0x20,
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H2C_8723B_PS_LPS_PARA = 0x23,
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H2C_8723B_P2P_PS_OFFLOAD = 0x24,
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H2C_8723B_RA_MASK = 0x40,
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H2C_RSSIBE_REPORT = 0x42,
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/*Not defined CTW CMD for P2P yet*/
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H2C_8723B_P2P_PS_CTW_CMD,
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MAX_8723B_H2CCMD
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};
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#define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
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#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_RLBM(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 4, __val)
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#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 4, 4, __val)
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#define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+3, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+4, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_BYTE5(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 5, 0, 8, __val)
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#define GET_88E_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd) \
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LE_BITS_TO_1BYTE(__ph2ccmd, 0, 8)
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#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 1, __val)
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#define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 1, 1, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
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void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
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u32 cmd_len, u8 *p_cmdbuffer);
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void rtl8723be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
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void rtl8723be_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus);
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void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
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void rtl8723be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
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#endif
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