483 lines
10 KiB
C
483 lines
10 KiB
C
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/*
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* Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "dc.h"
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#include "plane.h"
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static void tegra_plane_destroy(struct drm_plane *plane)
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{
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struct tegra_plane *p = to_tegra_plane(plane);
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drm_plane_cleanup(plane);
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kfree(p);
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}
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static void tegra_plane_reset(struct drm_plane *plane)
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{
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struct tegra_plane *p = to_tegra_plane(plane);
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struct tegra_plane_state *state;
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if (plane->state)
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__drm_atomic_helper_plane_destroy_state(plane->state);
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kfree(plane->state);
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plane->state = NULL;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (state) {
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plane->state = &state->base;
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plane->state->plane = plane;
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plane->state->zpos = p->index;
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plane->state->normalized_zpos = p->index;
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}
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}
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static struct drm_plane_state *
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tegra_plane_atomic_duplicate_state(struct drm_plane *plane)
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{
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struct tegra_plane_state *state = to_tegra_plane_state(plane->state);
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struct tegra_plane_state *copy;
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unsigned int i;
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copy = kmalloc(sizeof(*copy), GFP_KERNEL);
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if (!copy)
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return NULL;
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__drm_atomic_helper_plane_duplicate_state(plane, ©->base);
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copy->tiling = state->tiling;
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copy->format = state->format;
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copy->swap = state->swap;
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copy->bottom_up = state->bottom_up;
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copy->opaque = state->opaque;
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for (i = 0; i < 2; i++)
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copy->blending[i] = state->blending[i];
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return ©->base;
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}
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static void tegra_plane_atomic_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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__drm_atomic_helper_plane_destroy_state(state);
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kfree(state);
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}
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static bool tegra_plane_format_mod_supported(struct drm_plane *plane,
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uint32_t format,
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uint64_t modifier)
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{
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const struct drm_format_info *info = drm_format_info(format);
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if (modifier == DRM_FORMAT_MOD_LINEAR)
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return true;
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if (info->num_planes == 1)
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return true;
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return false;
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}
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const struct drm_plane_funcs tegra_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = tegra_plane_destroy,
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.reset = tegra_plane_reset,
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.atomic_duplicate_state = tegra_plane_atomic_duplicate_state,
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.atomic_destroy_state = tegra_plane_atomic_destroy_state,
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.format_mod_supported = tegra_plane_format_mod_supported,
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};
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int tegra_plane_state_add(struct tegra_plane *plane,
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struct drm_plane_state *state)
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{
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struct drm_crtc_state *crtc_state;
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struct tegra_dc_state *tegra;
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int err;
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/* Propagate errors from allocation or locking failures. */
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crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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/* Check plane state for visibility and calculate clipping bounds */
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err = drm_atomic_helper_check_plane_state(state, crtc_state,
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0, INT_MAX, true, true);
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if (err < 0)
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return err;
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tegra = to_dc_state(crtc_state);
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tegra->planes |= WIN_A_ACT_REQ << plane->index;
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return 0;
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}
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int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap)
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{
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/* assume no swapping of fetched data */
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if (swap)
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*swap = BYTE_SWAP_NOSWAP;
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switch (fourcc) {
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case DRM_FORMAT_ARGB4444:
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*format = WIN_COLOR_DEPTH_B4G4R4A4;
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break;
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case DRM_FORMAT_ARGB1555:
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*format = WIN_COLOR_DEPTH_B5G5R5A1;
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break;
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case DRM_FORMAT_RGB565:
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*format = WIN_COLOR_DEPTH_B5G6R5;
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break;
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case DRM_FORMAT_RGBA5551:
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*format = WIN_COLOR_DEPTH_A1B5G5R5;
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break;
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case DRM_FORMAT_ARGB8888:
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*format = WIN_COLOR_DEPTH_B8G8R8A8;
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break;
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case DRM_FORMAT_ABGR8888:
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*format = WIN_COLOR_DEPTH_R8G8B8A8;
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break;
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case DRM_FORMAT_ABGR4444:
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*format = WIN_COLOR_DEPTH_R4G4B4A4;
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break;
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case DRM_FORMAT_ABGR1555:
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*format = WIN_COLOR_DEPTH_R5G5B5A;
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break;
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case DRM_FORMAT_BGRA5551:
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*format = WIN_COLOR_DEPTH_AR5G5B5;
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break;
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case DRM_FORMAT_XRGB1555:
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*format = WIN_COLOR_DEPTH_B5G5R5X1;
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break;
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case DRM_FORMAT_RGBX5551:
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*format = WIN_COLOR_DEPTH_X1B5G5R5;
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break;
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case DRM_FORMAT_XBGR1555:
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*format = WIN_COLOR_DEPTH_R5G5B5X1;
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break;
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case DRM_FORMAT_BGRX5551:
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*format = WIN_COLOR_DEPTH_X1R5G5B5;
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break;
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case DRM_FORMAT_BGR565:
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*format = WIN_COLOR_DEPTH_R5G6B5;
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break;
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case DRM_FORMAT_BGRA8888:
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*format = WIN_COLOR_DEPTH_A8R8G8B8;
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break;
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case DRM_FORMAT_RGBA8888:
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*format = WIN_COLOR_DEPTH_A8B8G8R8;
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break;
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case DRM_FORMAT_XRGB8888:
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*format = WIN_COLOR_DEPTH_B8G8R8X8;
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break;
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case DRM_FORMAT_XBGR8888:
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*format = WIN_COLOR_DEPTH_R8G8B8X8;
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break;
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case DRM_FORMAT_UYVY:
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*format = WIN_COLOR_DEPTH_YCbCr422;
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break;
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case DRM_FORMAT_YUYV:
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if (!swap)
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return -EINVAL;
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*format = WIN_COLOR_DEPTH_YCbCr422;
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*swap = BYTE_SWAP_SWAP2;
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break;
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case DRM_FORMAT_YUV420:
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*format = WIN_COLOR_DEPTH_YCbCr420P;
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break;
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case DRM_FORMAT_YUV422:
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*format = WIN_COLOR_DEPTH_YCbCr422P;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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bool tegra_plane_format_is_yuv(unsigned int format, bool *planar)
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{
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switch (format) {
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case WIN_COLOR_DEPTH_YCbCr422:
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case WIN_COLOR_DEPTH_YUV422:
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if (planar)
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*planar = false;
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return true;
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case WIN_COLOR_DEPTH_YCbCr420P:
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case WIN_COLOR_DEPTH_YUV420P:
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case WIN_COLOR_DEPTH_YCbCr422P:
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case WIN_COLOR_DEPTH_YUV422P:
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case WIN_COLOR_DEPTH_YCbCr422R:
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case WIN_COLOR_DEPTH_YUV422R:
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case WIN_COLOR_DEPTH_YCbCr422RA:
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case WIN_COLOR_DEPTH_YUV422RA:
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if (planar)
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*planar = true;
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return true;
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}
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if (planar)
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*planar = false;
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return false;
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}
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static bool __drm_format_has_alpha(u32 format)
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{
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switch (format) {
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case DRM_FORMAT_ARGB1555:
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case DRM_FORMAT_RGBA5551:
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case DRM_FORMAT_ABGR8888:
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case DRM_FORMAT_ARGB8888:
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return true;
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}
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return false;
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}
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static int tegra_plane_format_get_alpha(unsigned int opaque,
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unsigned int *alpha)
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{
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if (tegra_plane_format_is_yuv(opaque, NULL)) {
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*alpha = opaque;
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return 0;
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}
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switch (opaque) {
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case WIN_COLOR_DEPTH_B5G5R5X1:
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*alpha = WIN_COLOR_DEPTH_B5G5R5A1;
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return 0;
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case WIN_COLOR_DEPTH_X1B5G5R5:
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*alpha = WIN_COLOR_DEPTH_A1B5G5R5;
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return 0;
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case WIN_COLOR_DEPTH_R8G8B8X8:
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*alpha = WIN_COLOR_DEPTH_R8G8B8A8;
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return 0;
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case WIN_COLOR_DEPTH_B8G8R8X8:
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*alpha = WIN_COLOR_DEPTH_B8G8R8A8;
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return 0;
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case WIN_COLOR_DEPTH_B5G6R5:
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*alpha = opaque;
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return 0;
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}
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return -EINVAL;
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}
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/*
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* This is applicable to Tegra20 and Tegra30 only where the opaque formats can
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* be emulated using the alpha formats and alpha blending disabled.
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*/
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static int tegra_plane_setup_opacity(struct tegra_plane *tegra,
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struct tegra_plane_state *state)
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{
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unsigned int format;
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int err;
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switch (state->format) {
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case WIN_COLOR_DEPTH_B5G5R5A1:
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case WIN_COLOR_DEPTH_A1B5G5R5:
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case WIN_COLOR_DEPTH_R8G8B8A8:
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case WIN_COLOR_DEPTH_B8G8R8A8:
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state->opaque = false;
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break;
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default:
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err = tegra_plane_format_get_alpha(state->format, &format);
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if (err < 0)
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return err;
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state->format = format;
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state->opaque = true;
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break;
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}
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return 0;
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}
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static int tegra_plane_check_transparency(struct tegra_plane *tegra,
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struct tegra_plane_state *state)
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{
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struct drm_plane_state *old, *plane_state;
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struct drm_plane *plane;
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old = drm_atomic_get_old_plane_state(state->base.state, &tegra->base);
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/* check if zpos / transparency changed */
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if (old->normalized_zpos == state->base.normalized_zpos &&
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to_tegra_plane_state(old)->opaque == state->opaque)
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return 0;
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/* include all sibling planes into this commit */
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drm_for_each_plane(plane, tegra->base.dev) {
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struct tegra_plane *p = to_tegra_plane(plane);
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/* skip this plane and planes on different CRTCs */
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if (p == tegra || p->dc != tegra->dc)
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continue;
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plane_state = drm_atomic_get_plane_state(state->base.state,
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plane);
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if (IS_ERR(plane_state))
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return PTR_ERR(plane_state);
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}
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return 1;
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}
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static unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane,
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struct tegra_plane *other)
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{
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unsigned int index = 0, i;
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WARN_ON(plane == other);
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for (i = 0; i < 3; i++) {
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if (i == plane->index)
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continue;
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if (i == other->index)
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break;
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index++;
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}
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return index;
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}
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static void tegra_plane_update_transparency(struct tegra_plane *tegra,
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struct tegra_plane_state *state)
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{
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struct drm_plane_state *new;
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struct drm_plane *plane;
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unsigned int i;
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for_each_new_plane_in_state(state->base.state, plane, new, i) {
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struct tegra_plane *p = to_tegra_plane(plane);
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unsigned index;
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/* skip this plane and planes on different CRTCs */
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if (p == tegra || p->dc != tegra->dc)
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continue;
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index = tegra_plane_get_overlap_index(tegra, p);
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if (new->fb && __drm_format_has_alpha(new->fb->format->format))
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state->blending[index].alpha = true;
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else
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state->blending[index].alpha = false;
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if (new->normalized_zpos > state->base.normalized_zpos)
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state->blending[index].top = true;
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else
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state->blending[index].top = false;
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/*
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* Missing framebuffer means that plane is disabled, in this
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* case mark B / C window as top to be able to differentiate
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* windows indices order in regards to zPos for the middle
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* window X / Y registers programming.
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*/
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if (!new->fb)
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state->blending[index].top = (index == 1);
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}
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}
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static int tegra_plane_setup_transparency(struct tegra_plane *tegra,
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struct tegra_plane_state *state)
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{
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struct tegra_plane_state *tegra_state;
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struct drm_plane_state *new;
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struct drm_plane *plane;
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int err;
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/*
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* If planes zpos / transparency changed, sibling planes blending
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* state may require adjustment and in this case they will be included
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* into this atom commit, otherwise blending state is unchanged.
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*/
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err = tegra_plane_check_transparency(tegra, state);
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if (err <= 0)
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return err;
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/*
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* All planes are now in the atomic state, walk them up and update
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* transparency state for each plane.
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*/
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drm_for_each_plane(plane, tegra->base.dev) {
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struct tegra_plane *p = to_tegra_plane(plane);
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/* skip planes on different CRTCs */
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if (p->dc != tegra->dc)
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continue;
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new = drm_atomic_get_new_plane_state(state->base.state, plane);
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tegra_state = to_tegra_plane_state(new);
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/*
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* There is no need to update blending state for the disabled
|
||
|
* plane.
|
||
|
*/
|
||
|
if (new->fb)
|
||
|
tegra_plane_update_transparency(p, tegra_state);
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
|
||
|
struct tegra_plane_state *state)
|
||
|
{
|
||
|
int err;
|
||
|
|
||
|
err = tegra_plane_setup_opacity(tegra, state);
|
||
|
if (err < 0)
|
||
|
return err;
|
||
|
|
||
|
err = tegra_plane_setup_transparency(tegra, state);
|
||
|
if (err < 0)
|
||
|
return err;
|
||
|
|
||
|
return 0;
|
||
|
}
|