163 lines
4 KiB
C
163 lines
4 KiB
C
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/*
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* Pin controller and GPIO driver for Amlogic Meson SoCs
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*
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* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/gpio.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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/**
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* struct meson_pmx_group - a pinmux group
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*
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* @name: group name
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* @pins: pins in the group
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* @num_pins: number of pins in the group
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* @is_gpio: whether the group is a single GPIO group
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* @reg: register offset for the group in the domain mux registers
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* @bit bit index enabling the group
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* @domain: index of the domain this group belongs to
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*/
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struct meson_pmx_group {
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const char *name;
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const unsigned int *pins;
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unsigned int num_pins;
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const void *data;
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};
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/**
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* struct meson_pmx_func - a pinmux function
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*
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* @name: function name
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* @groups: groups in the function
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* @num_groups: number of groups in the function
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*/
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struct meson_pmx_func {
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const char *name;
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const char * const *groups;
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unsigned int num_groups;
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};
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/**
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* struct meson_reg_desc - a register descriptor
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*
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* @reg: register offset in the regmap
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* @bit: bit index in register
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*
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* The structure describes the information needed to control pull,
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* pull-enable, direction, etc. for a single pin
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*/
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struct meson_reg_desc {
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unsigned int reg;
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unsigned int bit;
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};
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/**
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* enum meson_reg_type - type of registers encoded in @meson_reg_desc
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*/
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enum meson_reg_type {
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REG_PULLEN,
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REG_PULL,
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REG_DIR,
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REG_OUT,
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REG_IN,
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NUM_REG,
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};
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/**
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* struct meson bank
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*
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* @name: bank name
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* @first: first pin of the bank
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* @last: last pin of the bank
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* @irq: hwirq base number of the bank
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* @regs: array of register descriptors
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*
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* A bank represents a set of pins controlled by a contiguous set of
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* bits in the domain registers. The structure specifies which bits in
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* the regmap control the different functionalities. Each member of
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* the @regs array refers to the first pin of the bank.
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*/
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struct meson_bank {
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const char *name;
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unsigned int first;
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unsigned int last;
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int irq_first;
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int irq_last;
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struct meson_reg_desc regs[NUM_REG];
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};
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struct meson_pinctrl_data {
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const char *name;
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const struct pinctrl_pin_desc *pins;
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struct meson_pmx_group *groups;
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struct meson_pmx_func *funcs;
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unsigned int num_pins;
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unsigned int num_groups;
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unsigned int num_funcs;
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struct meson_bank *banks;
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unsigned int num_banks;
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const struct pinmux_ops *pmx_ops;
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void *pmx_data;
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};
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struct meson_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pcdev;
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struct pinctrl_desc desc;
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struct meson_pinctrl_data *data;
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struct regmap *reg_mux;
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struct regmap *reg_pullen;
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struct regmap *reg_pull;
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struct regmap *reg_gpio;
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struct gpio_chip chip;
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struct device_node *of_node;
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};
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#define FUNCTION(fn) \
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{ \
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.name = #fn, \
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.groups = fn ## _groups, \
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.num_groups = ARRAY_SIZE(fn ## _groups), \
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}
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#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
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{ \
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.name = n, \
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.first = f, \
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.last = l, \
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.irq_first = fi, \
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.irq_last = li, \
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.regs = { \
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[REG_PULLEN] = { per, peb }, \
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[REG_PULL] = { pr, pb }, \
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[REG_DIR] = { dr, db }, \
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[REG_OUT] = { or, ob }, \
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[REG_IN] = { ir, ib }, \
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}, \
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}
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#define MESON_PIN(x) PINCTRL_PIN(x, #x)
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/* Common pmx functions */
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int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
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const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
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unsigned selector);
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int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
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unsigned selector,
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const char * const **groups,
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unsigned * const num_groups);
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/* Common probe function */
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int meson_pinctrl_probe(struct platform_device *pdev);
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