720 lines
16 KiB
C
720 lines
16 KiB
C
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/*
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* DSPG DBMD4/DBMD6/DBMD8 SPI interface driver
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*
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* Copyright (C) 2014 DSP Group
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* #define DEBUG */
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/of_gpio.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/firmware.h>
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#include "dbmdx-interface.h"
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#include "dbmdx-va-regmap.h"
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#include "dbmdx-vqe-regmap.h"
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#include "dbmdx-spi.h"
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#define DBMD4_MAX_SPI_BOOT_SPEED 4000000
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static const u8 clr_crc_cmd[] = {0x5A, 0x0F};
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static const u8 chng_pll_cmd_32k[] = {0x5A, 0x10, 0x00, 0xEC, 0x0B, 0x00};
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static const u8 chng_pll_cmd_24m[] = {0x5A, 0x10, 0x00, 0x04, 0x00, 0x00};
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static const u8 set_gpio_8_in[] = {0x5A, 0x04, 0x4C, 0x00, 0x00,
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0x03, 0x14, 0x55, 0x00, 0x88};
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static int dbmd4_spi_boot(const void *fw_data, size_t fw_size,
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struct dbmdx_private *p, const void *checksum,
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size_t chksum_len, int load_fw)
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{
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int retry = RETRY_COUNT;
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int ret = 0;
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ssize_t send_bytes;
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struct dbmdx_spi_private *spi_p =
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(struct dbmdx_spi_private *)p->chip->pdata;
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struct spi_device *spi = spi_p->client;
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dev_dbg(spi_p->dev, "%s\n", __func__);
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do {
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if (p->active_fw == DBMDX_FW_PRE_BOOT) {
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if (!(p->boot_mode & DBMDX_BOOT_MODE_RESET_DISABLED)) {
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/* reset DBMD4 chip */
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p->reset_sequence(p);
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} else {
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/* If failed and reset is disabled, break */
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if (retry != RETRY_COUNT) {
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retry = -1;
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break;
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}
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}
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/* Disable GPIO 8 */
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if (p->cur_boot_options &
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DBMDX_BOOT_OPT_SET_GPIO_8_IN) {
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ret = send_spi_data(p, set_gpio_8_in,
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sizeof(set_gpio_8_in));
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if (ret != sizeof(set_gpio_8_in)) {
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dev_err(p->dev,
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"%s: failed to set gpio 8 to input\n",
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__func__);
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continue;
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}
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}
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/* delay before sending commands */
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if (p->clk_get_rate(p, DBMDX_CLK_MASTER) <= 32768)
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msleep(DBMDX_MSLEEP_SPI_D4_AFTER_RESET_32K);
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else
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usleep_range(DBMDX_USLEEP_SPI_D4_AFTER_RESET,
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DBMDX_USLEEP_SPI_D4_AFTER_RESET + 5000);
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ret = spi_set_speed(p, DBMDX_VA_SPEED_MAX);
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if (ret < 0) {
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dev_err(spi_p->dev, "%s:failed %x\n",
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__func__, ret);
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continue;
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}
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if ((spi->max_speed_hz > DBMD4_MAX_SPI_BOOT_SPEED) &&
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(p->cur_firmware_id == DBMDX_FIRMWARE_ID_DBMD4) &&
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!(p->cur_boot_options & DBMDX_BOOT_OPT_DONT_SET_PLL)) {
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ret = spi_set_speed(p, DBMDX_VA_SPEED_NORMAL);
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if (ret < 0) {
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dev_err(spi_p->dev, "%s:failed %x\n",
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__func__, ret);
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continue;
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}
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/* Send change PLL command */
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if (p->clk_get_rate(p, DBMDX_CLK_MASTER)
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<= 32768) {
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ret = send_spi_data(p, chng_pll_cmd_32k,
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sizeof(chng_pll_cmd_32k));
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if (ret != sizeof(chng_pll_cmd_32k)) {
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dev_err(p->dev,
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"%s: failed to change PLL\n",
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__func__);
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continue;
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}
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} else {
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ret = send_spi_data(p, chng_pll_cmd_24m,
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sizeof(chng_pll_cmd_24m));
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if (ret != sizeof(chng_pll_cmd_24m)) {
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dev_err(p->dev,
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"%s: failed to change PLL\n",
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__func__);
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continue;
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}
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}
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msleep(DBMDX_MSLEEP_SPI_D4_AFTER_PLL_CHANGE);
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ret = spi_set_speed(p, DBMDX_VA_SPEED_MAX);
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if (ret < 0) {
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dev_err(spi_p->dev, "%s:failed %x\n",
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__func__, ret);
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continue;
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}
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}
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/* verify chip id */
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if (p->cur_boot_options &
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DBMDX_BOOT_OPT_VERIFY_CHIP_ID) {
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ret = spi_verify_chip_id(p);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: couldn't verify chip id\n",
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__func__);
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continue;
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}
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}
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if (!(p->cur_boot_options &
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DBMDX_BOOT_OPT_DONT_CLR_CRC)) {
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/* send CRC clear command */
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ret = send_spi_data(p, clr_crc_cmd,
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sizeof(clr_crc_cmd));
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if (ret != sizeof(clr_crc_cmd)) {
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dev_err(p->dev,
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"%s: failed to clear CRC\n",
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__func__);
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continue;
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}
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}
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} else {
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ret = send_spi_cmd_va(p,
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DBMDX_VA_SWITCH_TO_BOOT,
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NULL);
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if (ret < 0) {
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dev_err(p->dev,
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"%s: failed to send 'Switch to BOOT' cmd\n",
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__func__);
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continue;
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}
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}
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if (!load_fw)
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break;
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/* send firmware */
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send_bytes = send_spi_data(p, fw_data, fw_size - 4);
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if (send_bytes != fw_size - 4) {
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dev_err(p->dev,
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"%s: -----------> load firmware error\n",
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__func__);
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continue;
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}
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/* verify checksum */
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if (checksum && !(p->cur_boot_options &
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DBMDX_BOOT_OPT_DONT_VERIFY_CRC)) {
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ret = spi_verify_boot_checksum(p, checksum, chksum_len);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: could not verify checksum\n",
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__func__);
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continue;
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}
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}
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dev_info(p->dev, "%s: ---------> firmware loaded\n",
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__func__);
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break;
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} while (--retry);
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/* no retries left, failed to boot */
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if (retry <= 0) {
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dev_err(p->dev, "%s: failed to load firmware\n", __func__);
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return -EIO;
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}
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if (!(p->cur_boot_options & DBMDX_BOOT_OPT_DONT_SEND_START_BOOT)) {
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/* send boot command */
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ret = send_spi_cmd_boot(p, DBMDX_FIRMWARE_BOOT);
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if (ret < 0) {
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dev_err(p->dev,
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"%s: booting the firmware failed\n", __func__);
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return -EIO;
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}
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}
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ret = spi_set_speed(p, DBMDX_VA_SPEED_NORMAL);
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if (ret < 0)
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dev_err(spi_p->dev, "%s:failed %x\n", __func__, ret);
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/* wait some time */
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usleep_range(DBMDX_USLEEP_SPI_D4_AFTER_BOOT,
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DBMDX_USLEEP_SPI_D4_AFTER_BOOT + 1000);
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return ret;
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}
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static int dbmd4_spi_reset_post_pll_divider(struct dbmdx_private *p)
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{
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struct dbmdx_spi_private *spi_p =
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(struct dbmdx_spi_private *)p->chip->pdata;
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int ret;
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dev_dbg(spi_p->dev, "%s\n", __func__);
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ret = send_spi_cmd_va(p,
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DBMDX_VA_GENERAL_CONFIGURATION_2,
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&spi_p->post_pll_div);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to get post pll divider\n",
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__func__);
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return ret;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_GENERAL_CONFIGURATION_2 |
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(spi_p->post_pll_div & ~DBMDX_POST_PLL_DIV_MASK),
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NULL);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to get post pll divider\n",
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__func__);
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return ret;
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}
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usleep_range(DBMDX_USLEEP_SPI_D4_POST_PLL,
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DBMDX_USLEEP_SPI_D4_POST_PLL + 1000);
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return 0;
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}
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static int dbmd4_spi_restore_post_pll_divider(struct dbmdx_private *p)
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{
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struct dbmdx_spi_private *spi_p =
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(struct dbmdx_spi_private *)p->chip->pdata;
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int ret;
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dev_dbg(spi_p->dev, "%s\n", __func__);
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ret = send_spi_cmd_va(p,
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DBMDX_VA_GENERAL_CONFIGURATION_2 |
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spi_p->post_pll_div,
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NULL);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to restore post pll divider\n",
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__func__);
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return ret;
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}
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usleep_range(DBMDX_USLEEP_SPI_D4_POST_PLL,
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DBMDX_USLEEP_SPI_D4_POST_PLL + 1000);
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return 0;
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}
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static int dbmd4_reconfigure_dsp_clock(struct dbmdx_private *p, int index)
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{
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struct dbmdx_spi_private *spi_p =
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(struct dbmdx_spi_private *)p->chip->pdata;
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int ret;
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u32 dsp_clock_cfg;
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u16 mic1_val;
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u16 mic2_val;
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dev_dbg(spi_p->dev, "%s\n", __func__);
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dsp_clock_cfg = p->pdata->va_speed_cfg[index].cfg;
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if (!dsp_clock_cfg) {
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dev_dbg(spi_p->dev,
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"%s: dsp clock cfg is not set for rate #%d\n",
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__func__, index);
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return 0;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_MICROPHONE1_CONFIGURATION,
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&mic1_val);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to get mic1 value\n",
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__func__);
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return ret;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_MICROPHONE2_CONFIGURATION,
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&mic2_val);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to get mic2 value\n",
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__func__);
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return ret;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_MICROPHONE1_CONFIGURATION,
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NULL);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to reset mic1 value\n",
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__func__);
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return ret;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_MICROPHONE2_CONFIGURATION,
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NULL);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to reset mic2 value\n",
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__func__);
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return ret;
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}
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ret = send_spi_cmd_va(p,
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DBMDX_VA_CLK_CFG | (dsp_clock_cfg & 0xffff),
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NULL);
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if (ret < 0) {
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dev_err(spi_p->dev,
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"%s: failed to set DBMDX_VA_CLK_CFG\n",
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__func__);
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|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Give to PLL enough time for stabilization */
|
||
|
|
msleep(DBMDX_MSLEEP_CONFIG_VA_MODE_REG);
|
||
|
|
|
||
|
|
ret = send_spi_cmd_va(p,
|
||
|
|
DBMDX_VA_MICROPHONE1_CONFIGURATION | mic1_val,
|
||
|
|
NULL);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev,
|
||
|
|
"%s: failed to restore mic1 value\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = send_spi_cmd_va(p,
|
||
|
|
DBMDX_VA_MICROPHONE2_CONFIGURATION | mic2_val,
|
||
|
|
NULL);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev,
|
||
|
|
"%s: failed to restore mic2 value\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
static int dbmd4_spi_switch_to_buffering_speed(struct dbmdx_private *p,
|
||
|
|
bool reconfigure_dsp_clock)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
if (p->cur_firmware_id == DBMDX_FIRMWARE_ID_DBMD4) {
|
||
|
|
ret = dbmd4_spi_reset_post_pll_divider(p);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev,
|
||
|
|
"%s: failed, cannot reset post pll divider\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if (reconfigure_dsp_clock) {
|
||
|
|
|
||
|
|
ret = dbmd4_reconfigure_dsp_clock(p, DBMDX_VA_SPEED_BUFFERING);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev,
|
||
|
|
"%s: failed to reconfigure dsp clock\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = spi_set_speed(p, DBMDX_VA_SPEED_BUFFERING);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev, "%s:failed setting speed %x\n",
|
||
|
|
__func__, ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmd4_spi_switch_to_normal_speed(struct dbmdx_private *p,
|
||
|
|
bool reconfigure_dsp_clock)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
ret = spi_set_speed(p, DBMDX_VA_SPEED_NORMAL);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev, "%s:failed setting speed %x\n",
|
||
|
|
__func__, ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
if (p->cur_firmware_id == DBMDX_FIRMWARE_ID_DBMD4) {
|
||
|
|
|
||
|
|
ret = dbmd4_spi_restore_post_pll_divider(p);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(p->dev,
|
||
|
|
"%s: failed, cannot restore post pll divider\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if (reconfigure_dsp_clock) {
|
||
|
|
|
||
|
|
ret = dbmd4_reconfigure_dsp_clock(p, DBMDX_VA_SPEED_NORMAL);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(spi_p->dev,
|
||
|
|
"%s: failed to reconfigure dsp clock\n",
|
||
|
|
__func__);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmd4_spi_prepare_buffering(struct dbmdx_private *p)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
ret = dbmd4_spi_switch_to_buffering_speed(p, false);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(p->dev,
|
||
|
|
"%s: failed to change speed to buffering\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
out:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmd4_spi_finish_buffering(struct dbmdx_private *p)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
ret = dbmd4_spi_switch_to_normal_speed(p, false);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(p->dev,
|
||
|
|
"%s: failed to change speed to buffering\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
out:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
static int dbmd4_spi_prepare_amodel_loading(struct dbmdx_private *p)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
ret = dbmd4_spi_switch_to_buffering_speed(p, true);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(p->dev,
|
||
|
|
"%s: failed to change speed to buffering\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
|
||
|
|
out:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmd4_spi_finish_amodel_loading(struct dbmdx_private *p)
|
||
|
|
{
|
||
|
|
struct dbmdx_spi_private *spi_p =
|
||
|
|
(struct dbmdx_spi_private *)p->chip->pdata;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
dev_dbg(spi_p->dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
ret = dbmd4_spi_switch_to_normal_speed(p, true);
|
||
|
|
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(p->dev,
|
||
|
|
"%s: failed to change speed to buffering\n",
|
||
|
|
__func__);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
out:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_PM_SLEEP)
|
||
|
|
static int dbmdx_spi_suspend(struct device *dev)
|
||
|
|
{
|
||
|
|
struct chip_interface *ci = spi_get_drvdata(to_spi_device(dev));
|
||
|
|
struct dbmdx_spi_private *spi_p = (struct dbmdx_spi_private *)ci->pdata;
|
||
|
|
|
||
|
|
dev_dbg(dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
spi_interface_suspend(spi_p);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmdx_spi_resume(struct device *dev)
|
||
|
|
{
|
||
|
|
struct chip_interface *ci = spi_get_drvdata(to_spi_device(dev));
|
||
|
|
struct dbmdx_spi_private *spi_p = (struct dbmdx_spi_private *)ci->pdata;
|
||
|
|
|
||
|
|
dev_dbg(dev, "%s\n", __func__);
|
||
|
|
spi_interface_resume(spi_p);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
#define dbmdx_spi_suspend NULL
|
||
|
|
#define dbmdx_spi_resume NULL
|
||
|
|
#endif /* CONFIG_PM_SLEEP */
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_PM)
|
||
|
|
static int dbmdx_spi_runtime_suspend(struct device *dev)
|
||
|
|
{
|
||
|
|
struct chip_interface *ci = spi_get_drvdata(to_spi_device(dev));
|
||
|
|
struct dbmdx_spi_private *spi_p = (struct dbmdx_spi_private *)ci->pdata;
|
||
|
|
|
||
|
|
dev_dbg(dev, "%s\n", __func__);
|
||
|
|
|
||
|
|
spi_interface_suspend(spi_p);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int dbmdx_spi_runtime_resume(struct device *dev)
|
||
|
|
{
|
||
|
|
struct chip_interface *ci = spi_get_drvdata(to_spi_device(dev));
|
||
|
|
struct dbmdx_spi_private *spi_p = (struct dbmdx_spi_private *)ci->pdata;
|
||
|
|
|
||
|
|
dev_dbg(dev, "%s\n", __func__);
|
||
|
|
spi_interface_resume(spi_p);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
#define dbmdx_spi_runtime_suspend NULL
|
||
|
|
#define dbmdx_spi_runtime_resume NULL
|
||
|
|
#endif /* CONFIG_PM */
|
||
|
|
|
||
|
|
static const struct dev_pm_ops dbmdx_spi_pm = {
|
||
|
|
SET_SYSTEM_SLEEP_PM_OPS(dbmdx_spi_suspend, dbmdx_spi_resume)
|
||
|
|
SET_RUNTIME_PM_OPS(dbmdx_spi_runtime_suspend,
|
||
|
|
dbmdx_spi_runtime_resume, NULL)
|
||
|
|
};
|
||
|
|
|
||
|
|
static int dbmd4_spi_probe(struct spi_device *client)
|
||
|
|
{
|
||
|
|
int rc;
|
||
|
|
struct dbmdx_spi_private *p;
|
||
|
|
struct chip_interface *ci;
|
||
|
|
|
||
|
|
rc = spi_common_probe(client);
|
||
|
|
|
||
|
|
if (rc < 0)
|
||
|
|
return rc;
|
||
|
|
|
||
|
|
ci = spi_get_drvdata(client);
|
||
|
|
p = (struct dbmdx_spi_private *)ci->pdata;
|
||
|
|
|
||
|
|
/* fill in chip interface functions */
|
||
|
|
p->chip.prepare_amodel_loading = dbmd4_spi_prepare_amodel_loading;
|
||
|
|
p->chip.finish_amodel_loading = dbmd4_spi_finish_amodel_loading;
|
||
|
|
p->chip.prepare_buffering = dbmd4_spi_prepare_buffering;
|
||
|
|
p->chip.finish_buffering = dbmd4_spi_finish_buffering;
|
||
|
|
p->chip.boot = dbmd4_spi_boot;
|
||
|
|
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id dbmd_4_8_spi_of_match[] = {
|
||
|
|
{ .compatible = "dspg,dbmd4-spi", },
|
||
|
|
{ .compatible = "dspg,dbmd6-spi", },
|
||
|
|
{ .compatible = "dspg,dbmd8-spi", },
|
||
|
|
{},
|
||
|
|
};
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_SND_SOC_DBMDX)
|
||
|
|
MODULE_DEVICE_TABLE(of, dbmd_4_8_spi_of_match);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static const struct spi_device_id dbmd_4_8_spi_id[] = {
|
||
|
|
{ "dbmdx-spi", 0 },
|
||
|
|
{ "dbmd4-spi", 0 },
|
||
|
|
{ "dbmd6-spi", 0 },
|
||
|
|
{ "dbmd8-spi", 0 },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(spi, dbmd_4_8_spi_id);
|
||
|
|
|
||
|
|
static struct spi_driver dbmd_4_8_spi_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "dbmd_4_8-spi",
|
||
|
|
.bus = &spi_bus_type,
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
#if IS_ENABLED(CONFIG_OF)
|
||
|
|
.of_match_table = dbmd_4_8_spi_of_match,
|
||
|
|
#endif
|
||
|
|
.pm = &dbmdx_spi_pm,
|
||
|
|
},
|
||
|
|
.probe = dbmd4_spi_probe,
|
||
|
|
.remove = spi_common_remove,
|
||
|
|
.id_table = dbmd_4_8_spi_id,
|
||
|
|
};
|
||
|
|
|
||
|
|
#if (IS_ENABLED(CONFIG_SND_SOC_DBMDX) && !IS_MODULE(CONFIG_SND_SOC_DBMDX))
|
||
|
|
static int __init dbmd_4_8_modinit(void)
|
||
|
|
{
|
||
|
|
return spi_register_driver(&dbmd_4_8_spi_driver);
|
||
|
|
}
|
||
|
|
module_init(dbmd_4_8_modinit);
|
||
|
|
|
||
|
|
static void __exit dbmd_4_8_exit(void)
|
||
|
|
{
|
||
|
|
spi_unregister_driver(&dbmd_4_8_spi_driver);
|
||
|
|
}
|
||
|
|
module_exit(dbmd_4_8_exit);
|
||
|
|
#else
|
||
|
|
int dbmd4_spi_init_interface(void)
|
||
|
|
{
|
||
|
|
spi_register_driver(&dbmd_4_8_spi_driver);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void dbmd4_spi_deinit_interface(void)
|
||
|
|
{
|
||
|
|
spi_unregister_driver(&dbmd_4_8_spi_driver);
|
||
|
|
}
|
||
|
|
|
||
|
|
int (*dbmdx_init_interface)(void) = &dbmd4_spi_init_interface;
|
||
|
|
void (*dbmdx_deinit_interface)(void) = &dbmd4_spi_deinit_interface;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("DSPG DBMD4/DBMD6/DBMD8 spi interface driver");
|
||
|
|
MODULE_LICENSE("GPL");
|