403 lines
9.5 KiB
C
403 lines
9.5 KiB
C
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/*
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* drivers/rtc/rtc-pcf85363.c
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*
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* Driver for NXP PCF85363 real-time clock.
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*
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* Copyright (C) 2017 Eric Nelson
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Based loosely on rtc-8583 by Russell King, Wolfram Sang and Juergen Beisert
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/rtc.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/bcd.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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/*
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* Date/Time registers
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*/
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#define DT_100THS 0x00
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#define DT_SECS 0x01
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#define DT_MINUTES 0x02
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#define DT_HOURS 0x03
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#define DT_DAYS 0x04
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#define DT_WEEKDAYS 0x05
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#define DT_MONTHS 0x06
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#define DT_YEARS 0x07
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/*
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* Alarm registers
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*/
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#define DT_SECOND_ALM1 0x08
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#define DT_MINUTE_ALM1 0x09
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#define DT_HOUR_ALM1 0x0a
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#define DT_DAY_ALM1 0x0b
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#define DT_MONTH_ALM1 0x0c
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#define DT_MINUTE_ALM2 0x0d
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#define DT_HOUR_ALM2 0x0e
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#define DT_WEEKDAY_ALM2 0x0f
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#define DT_ALARM_EN 0x10
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/*
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* Time stamp registers
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*/
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#define DT_TIMESTAMP1 0x11
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#define DT_TIMESTAMP2 0x17
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#define DT_TIMESTAMP3 0x1d
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#define DT_TS_MODE 0x23
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/*
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* control registers
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*/
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#define CTRL_OFFSET 0x24
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#define CTRL_OSCILLATOR 0x25
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#define CTRL_BATTERY 0x26
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#define CTRL_PIN_IO 0x27
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#define CTRL_FUNCTION 0x28
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#define CTRL_INTA_EN 0x29
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#define CTRL_INTB_EN 0x2a
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#define CTRL_FLAGS 0x2b
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#define CTRL_RAMBYTE 0x2c
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#define CTRL_WDOG 0x2d
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#define CTRL_STOP_EN 0x2e
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#define CTRL_RESETS 0x2f
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#define CTRL_RAM 0x40
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#define ALRM_SEC_A1E BIT(0)
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#define ALRM_MIN_A1E BIT(1)
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#define ALRM_HR_A1E BIT(2)
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#define ALRM_DAY_A1E BIT(3)
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#define ALRM_MON_A1E BIT(4)
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#define ALRM_MIN_A2E BIT(5)
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#define ALRM_HR_A2E BIT(6)
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#define ALRM_DAY_A2E BIT(7)
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#define INT_WDIE BIT(0)
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#define INT_BSIE BIT(1)
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#define INT_TSRIE BIT(2)
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#define INT_A2IE BIT(3)
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#define INT_A1IE BIT(4)
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#define INT_OIE BIT(5)
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#define INT_PIE BIT(6)
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#define INT_ILP BIT(7)
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#define FLAGS_TSR1F BIT(0)
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#define FLAGS_TSR2F BIT(1)
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#define FLAGS_TSR3F BIT(2)
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#define FLAGS_BSF BIT(3)
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#define FLAGS_WDF BIT(4)
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#define FLAGS_A1F BIT(5)
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#define FLAGS_A2F BIT(6)
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#define FLAGS_PIF BIT(7)
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#define PIN_IO_INTAPM GENMASK(1, 0)
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#define PIN_IO_INTA_CLK 0
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#define PIN_IO_INTA_BAT 1
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#define PIN_IO_INTA_OUT 2
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#define PIN_IO_INTA_HIZ 3
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#define STOP_EN_STOP BIT(0)
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#define RESET_CPR 0xa4
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#define NVRAM_SIZE 0x40
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static struct i2c_driver pcf85363_driver;
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struct pcf85363 {
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struct device *dev;
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struct rtc_device *rtc;
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struct regmap *regmap;
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};
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static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
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unsigned char buf[DT_YEARS + 1];
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int ret, len = sizeof(buf);
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/* read the RTC date and time registers all at once */
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ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
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if (ret) {
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dev_err(dev, "%s: error %d\n", __func__, ret);
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return ret;
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}
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tm->tm_year = bcd2bin(buf[DT_YEARS]);
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/* adjust for 1900 base of rtc_time */
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tm->tm_year += 100;
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tm->tm_wday = buf[DT_WEEKDAYS] & 7;
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buf[DT_SECS] &= 0x7F;
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tm->tm_sec = bcd2bin(buf[DT_SECS]);
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buf[DT_MINUTES] &= 0x7F;
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tm->tm_min = bcd2bin(buf[DT_MINUTES]);
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tm->tm_hour = bcd2bin(buf[DT_HOURS]);
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tm->tm_mday = bcd2bin(buf[DT_DAYS]);
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tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
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return 0;
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}
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static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
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unsigned char tmp[11];
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unsigned char *buf = &tmp[2];
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int ret;
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tmp[0] = STOP_EN_STOP;
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tmp[1] = RESET_CPR;
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buf[DT_100THS] = 0;
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buf[DT_SECS] = bin2bcd(tm->tm_sec);
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buf[DT_MINUTES] = bin2bcd(tm->tm_min);
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buf[DT_HOURS] = bin2bcd(tm->tm_hour);
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buf[DT_DAYS] = bin2bcd(tm->tm_mday);
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buf[DT_WEEKDAYS] = tm->tm_wday;
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buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
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buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
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ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
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tmp, 2);
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if (ret)
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return ret;
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ret = regmap_bulk_write(pcf85363->regmap, DT_100THS,
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buf, sizeof(tmp) - 2);
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if (ret)
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return ret;
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return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
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}
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static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
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unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
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unsigned int val;
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int ret;
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ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
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sizeof(buf));
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if (ret)
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return ret;
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alrm->time.tm_sec = bcd2bin(buf[0]);
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alrm->time.tm_min = bcd2bin(buf[1]);
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alrm->time.tm_hour = bcd2bin(buf[2]);
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alrm->time.tm_mday = bcd2bin(buf[3]);
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alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
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ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
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if (ret)
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return ret;
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alrm->enabled = !!(val & INT_A1IE);
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return 0;
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}
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static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
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int enabled)
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{
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unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
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ALRM_DAY_A1E | ALRM_MON_A1E;
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int ret;
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ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
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enabled ? alarm_flags : 0);
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if (ret)
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return ret;
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ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
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INT_A1IE, enabled ? INT_A1IE : 0);
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if (ret || enabled)
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return ret;
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/* clear current flags */
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return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
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}
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static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
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unsigned int enabled)
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{
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struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
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return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
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}
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static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
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unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
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int ret;
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buf[0] = bin2bcd(alrm->time.tm_sec);
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buf[1] = bin2bcd(alrm->time.tm_min);
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buf[2] = bin2bcd(alrm->time.tm_hour);
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buf[3] = bin2bcd(alrm->time.tm_mday);
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buf[4] = bin2bcd(alrm->time.tm_mon + 1);
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/*
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* Disable the alarm interrupt before changing the value to avoid
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* spurious interrupts
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*/
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ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
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if (ret)
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return ret;
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ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
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sizeof(buf));
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if (ret)
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return ret;
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return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
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}
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static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
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{
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struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
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unsigned int flags;
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int err;
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err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
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if (err)
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return IRQ_NONE;
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if (flags & FLAGS_A1F) {
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rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
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regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static const struct rtc_class_ops rtc_ops = {
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.read_time = pcf85363_rtc_read_time,
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.set_time = pcf85363_rtc_set_time,
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};
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static const struct rtc_class_ops rtc_ops_alarm = {
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.read_time = pcf85363_rtc_read_time,
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.set_time = pcf85363_rtc_set_time,
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.read_alarm = pcf85363_rtc_read_alarm,
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.set_alarm = pcf85363_rtc_set_alarm,
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.alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
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};
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static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
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size_t bytes)
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{
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struct pcf85363 *pcf85363 = priv;
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return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
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val, bytes);
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}
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static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
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size_t bytes)
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{
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struct pcf85363 *pcf85363 = priv;
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return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
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val, bytes);
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}
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x7f,
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};
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static int pcf85363_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct pcf85363 *pcf85363;
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struct nvmem_config nvmem_cfg = {
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.name = "pcf85363-",
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.word_size = 1,
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.stride = 1,
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.size = NVRAM_SIZE,
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.reg_read = pcf85363_nvram_read,
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.reg_write = pcf85363_nvram_write,
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};
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int ret;
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if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
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return -ENODEV;
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pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
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GFP_KERNEL);
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if (!pcf85363)
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return -ENOMEM;
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pcf85363->regmap = devm_regmap_init_i2c(client, ®map_config);
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if (IS_ERR(pcf85363->regmap)) {
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dev_err(&client->dev, "regmap allocation failed\n");
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return PTR_ERR(pcf85363->regmap);
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}
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pcf85363->dev = &client->dev;
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|
i2c_set_clientdata(client, pcf85363);
|
||
|
|
|
||
|
|
pcf85363->rtc = devm_rtc_allocate_device(pcf85363->dev);
|
||
|
|
if (IS_ERR(pcf85363->rtc))
|
||
|
|
return PTR_ERR(pcf85363->rtc);
|
||
|
|
|
||
|
|
pcf85363->rtc->ops = &rtc_ops;
|
||
|
|
|
||
|
|
if (client->irq > 0) {
|
||
|
|
regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
|
||
|
|
regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
|
||
|
|
PIN_IO_INTA_OUT, PIN_IO_INTAPM);
|
||
|
|
ret = devm_request_threaded_irq(pcf85363->dev, client->irq,
|
||
|
|
NULL, pcf85363_rtc_handle_irq,
|
||
|
|
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
|
||
|
|
"pcf85363", client);
|
||
|
|
if (ret)
|
||
|
|
dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
|
||
|
|
else
|
||
|
|
pcf85363->rtc->ops = &rtc_ops_alarm;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = rtc_register_device(pcf85363->rtc);
|
||
|
|
|
||
|
|
nvmem_cfg.priv = pcf85363;
|
||
|
|
rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id dev_ids[] = {
|
||
|
|
{ .compatible = "nxp,pcf85363" },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, dev_ids);
|
||
|
|
|
||
|
|
static struct i2c_driver pcf85363_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "pcf85363",
|
||
|
|
.of_match_table = of_match_ptr(dev_ids),
|
||
|
|
},
|
||
|
|
.probe = pcf85363_probe,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_i2c_driver(pcf85363_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Eric Nelson");
|
||
|
|
MODULE_DESCRIPTION("pcf85363 I2C RTC driver");
|
||
|
|
MODULE_LICENSE("GPL");
|