277 lines
9.2 KiB
C
277 lines
9.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _MOTOROLA_PGTABLE_H
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#define _MOTOROLA_PGTABLE_H
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/*
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* Definitions for MMU descriptors
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*/
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#define _PAGE_PRESENT 0x001
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#define _PAGE_SHORT 0x002
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#define _PAGE_RONLY 0x004
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#define _PAGE_READWRITE 0x000
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#define _PAGE_ACCESSED 0x008
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#define _PAGE_DIRTY 0x010
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#define _PAGE_SUPER 0x080 /* 68040 supervisor only */
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#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
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#define _PAGE_NOCACHE030 0x040 /* 68030 no-cache mode */
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#define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */
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#define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */
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#define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */
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#define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */
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#define _DESCTYPE_MASK 0x003
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#define _CACHEMASK040 (~0x060)
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#define _TABLE_MASK (0xfffffe00)
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#define _PAGE_TABLE (_PAGE_SHORT)
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#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)
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#define _PAGE_PROTNONE 0x004
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#ifndef __ASSEMBLY__
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/* This is the cache mode to be used for pages containing page descriptors for
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* processors >= '040. It is in pte_mknocache(), and the variable is defined
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* and initialized in head.S */
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extern int m68k_pgtable_cachemode;
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/* This is the cache mode for normal pages, for supervisor access on
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* processors >= '040. It is used in pte_mkcache(), and the variable is
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* defined and initialized in head.S */
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#if defined(CPU_M68060_ONLY) && defined(CONFIG_060_WRITETHROUGH)
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#define m68k_supervisor_cachemode _PAGE_CACHE040W
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#elif defined(CPU_M68040_OR_M68060_ONLY)
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#define m68k_supervisor_cachemode _PAGE_CACHE040
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#elif defined(CPU_M68020_OR_M68030_ONLY)
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#define m68k_supervisor_cachemode 0
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#else
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extern int m68k_supervisor_cachemode;
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#endif
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#if defined(CPU_M68040_OR_M68060_ONLY)
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#define mm_cachebits _PAGE_CACHE040
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#elif defined(CPU_M68020_OR_M68030_ONLY)
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#define mm_cachebits 0
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#else
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extern unsigned long mm_cachebits;
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#endif
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED | mm_cachebits)
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#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | mm_cachebits)
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#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
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#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
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#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | mm_cachebits)
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/* Alternate definitions that are compile time constants, for
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initializing protection_map. The cachebits are fixed later. */
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#define PAGE_NONE_C __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
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#define PAGE_SHARED_C __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
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#define PAGE_COPY_C __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
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#define PAGE_READONLY_C __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
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/*
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* The m68k can't do page protection for execute, and considers that the same are read.
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* Also, write permissions imply read permissions. This is the closest we can get..
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*/
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#define __P000 PAGE_NONE_C
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#define __P001 PAGE_READONLY_C
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#define __P010 PAGE_COPY_C
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#define __P011 PAGE_COPY_C
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#define __P100 PAGE_READONLY_C
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#define __P101 PAGE_READONLY_C
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#define __P110 PAGE_COPY_C
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#define __P111 PAGE_COPY_C
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#define __S000 PAGE_NONE_C
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#define __S001 PAGE_READONLY_C
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#define __S010 PAGE_SHARED_C
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#define __S011 PAGE_SHARED_C
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#define __S100 PAGE_READONLY_C
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#define __S101 PAGE_READONLY_C
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#define __S110 PAGE_SHARED_C
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#define __S111 PAGE_SHARED_C
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
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return pte;
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}
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static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
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{
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unsigned long ptbl = virt_to_phys(ptep) | _PAGE_TABLE | _PAGE_ACCESSED;
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unsigned long *ptr = pmdp->pmd;
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short i = 16;
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while (--i >= 0) {
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*ptr++ = ptbl;
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ptbl += (sizeof(pte_t)*PTRS_PER_PTE/16);
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}
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}
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static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
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{
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pgd_val(*pgdp) = _PAGE_TABLE | _PAGE_ACCESSED | __pa(pmdp);
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}
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#define __pte_page(pte) ((unsigned long)__va(pte_val(pte) & PAGE_MASK))
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#define __pmd_page(pmd) ((unsigned long)__va(pmd_val(pmd) & _TABLE_MASK))
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#define __pgd_page(pgd) ((unsigned long)__va(pgd_val(pgd) & _TABLE_MASK))
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#define pte_none(pte) (!pte_val(pte))
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#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))
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#define pte_clear(mm,addr,ptep) ({ pte_val(*(ptep)) = 0; })
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#define pte_page(pte) virt_to_page(__va(pte_val(pte)))
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#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
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#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
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#define pmd_none(pmd) (!pmd_val(pmd))
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#define pmd_bad(pmd) ((pmd_val(pmd) & _DESCTYPE_MASK) != _PAGE_TABLE)
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#define pmd_present(pmd) (pmd_val(pmd) & _PAGE_TABLE)
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#define pmd_clear(pmdp) ({ \
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unsigned long *__ptr = pmdp->pmd; \
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short __i = 16; \
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while (--__i >= 0) \
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*__ptr++ = 0; \
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})
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#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
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#define pgd_none(pgd) (!pgd_val(pgd))
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#define pgd_bad(pgd) ((pgd_val(pgd) & _DESCTYPE_MASK) != _PAGE_TABLE)
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#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_TABLE)
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#define pgd_clear(pgdp) ({ pgd_val(*pgdp) = 0; })
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#define pgd_page(pgd) (mem_map + ((unsigned long)(__va(pgd_val(pgd)) - PAGE_OFFSET) >> PAGE_SHIFT))
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#define pte_ERROR(e) \
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printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
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#define pmd_ERROR(e) \
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printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
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#define pgd_ERROR(e) \
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printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_RONLY); }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline int pte_special(pte_t pte) { return 0; }
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static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_RONLY; return pte; }
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static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_RONLY; return pte; }
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static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mknocache(pte_t pte)
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{
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pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
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return pte;
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}
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static inline pte_t pte_mkcache(pte_t pte)
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{
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pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_supervisor_cachemode;
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return pte;
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}
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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#define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
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#define pgd_index(address) ((address) >> PGDIR_SHIFT)
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/* to find an entry in a page-table-directory */
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static inline pgd_t *pgd_offset(const struct mm_struct *mm,
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unsigned long address)
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{
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return mm->pgd + pgd_index(address);
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}
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#define swapper_pg_dir kernel_pg_dir
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extern pgd_t kernel_pg_dir[128];
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static inline pgd_t *pgd_offset_k(unsigned long address)
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{
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return kernel_pg_dir + (address >> PGDIR_SHIFT);
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}
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/* Find an entry in the second-level page table.. */
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static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
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{
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return (pmd_t *)__pgd_page(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
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}
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/* Find an entry in the third-level page table.. */
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static inline pte_t *pte_offset_kernel(pmd_t *pmdp, unsigned long address)
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{
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return (pte_t *)__pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
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}
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#define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
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#define pte_unmap(pte) ((void)0)
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/*
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* Allocate and free page tables. The xxx_kernel() versions are
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* used to allocate a kernel page table - this turns on ASN bits
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* if any.
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*/
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/* Prior to calling these routines, the page should have been flushed
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* from both the cache and ATC, or the CPU might not notice that the
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* cache setting for the page has been changed. -jskov
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*/
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static inline void nocache_page(void *vaddr)
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{
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unsigned long addr = (unsigned long)vaddr;
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if (CPU_IS_040_OR_060) {
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pgd_t *dir;
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pmd_t *pmdp;
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pte_t *ptep;
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dir = pgd_offset_k(addr);
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pmdp = pmd_offset(dir, addr);
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ptep = pte_offset_kernel(pmdp, addr);
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*ptep = pte_mknocache(*ptep);
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}
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}
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static inline void cache_page(void *vaddr)
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{
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unsigned long addr = (unsigned long)vaddr;
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if (CPU_IS_040_OR_060) {
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pgd_t *dir;
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pmd_t *pmdp;
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pte_t *ptep;
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dir = pgd_offset_k(addr);
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pmdp = pmd_offset(dir, addr);
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ptep = pte_offset_kernel(pmdp, addr);
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*ptep = pte_mkcache(*ptep);
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}
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}
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/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
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#define __swp_type(x) (((x).val >> 4) & 0xff)
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#define __swp_offset(x) ((x).val >> 12)
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#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 12) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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#endif /* !__ASSEMBLY__ */
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#endif /* _MOTOROLA_PGTABLE_H */
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