858 lines
26 KiB
C
858 lines
26 KiB
C
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/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#include <linux/scatterlist.h>
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#include <linux/device.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#define IOMMU_READ (1 << 0)
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#define IOMMU_WRITE (1 << 1)
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#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
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#define IOMMU_NOEXEC (1 << 3)
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#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
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/*
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* Where the bus hardware includes a privilege level as part of its access type
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* markings, and certain devices are capable of issuing transactions marked as
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* either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
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* given permission flags only apply to accesses at the higher privilege level,
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* and that unprivileged transactions should have as little access as possible.
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* This would usually imply the same permissions as kernel mappings on the CPU,
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* if the IOMMU page table format is equivalent.
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*/
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#define IOMMU_PRIV (1 << 5)
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/* Use upstream device's bus attribute */
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#define IOMMU_USE_UPSTREAM_HINT (1 << 6)
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/* Use upstream device's bus attribute with no write-allocate cache policy */
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#define IOMMU_USE_LLC_NWA (1 << 7)
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struct iommu_ops;
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struct iommu_group;
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struct bus_type;
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struct device;
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struct iommu_domain;
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struct notifier_block;
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/* iommu fault flags */
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#define IOMMU_FAULT_READ (1 << 0)
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#define IOMMU_FAULT_WRITE (1 << 1)
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#define IOMMU_FAULT_TRANSLATION (1 << 2)
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#define IOMMU_FAULT_PERMISSION (1 << 3)
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#define IOMMU_FAULT_EXTERNAL (1 << 4)
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#define IOMMU_FAULT_TRANSACTION_STALLED (1 << 5)
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typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
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struct device *, unsigned long, int, void *);
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struct iommu_domain_geometry {
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dma_addr_t aperture_start; /* First address that can be mapped */
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dma_addr_t aperture_end; /* Last address that can be mapped */
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bool force_aperture; /* DMA only allowed in mappable range? */
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};
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struct iommu_pgtbl_info {
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void *ops;
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};
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/* Domain feature flags */
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#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
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#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
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implementation */
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#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
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/*
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* This are the possible domain-types
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*
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* IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
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* devices
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* IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
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* IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
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* for VMs
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* IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
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* This flag allows IOMMU drivers to implement
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* certain optimizations for these domains
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*/
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#define IOMMU_DOMAIN_BLOCKED (0U)
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#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
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#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
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#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
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__IOMMU_DOMAIN_DMA_API)
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#define IOMMU_DOMAIN_NAME_LEN 32
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struct iommu_domain {
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unsigned type;
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const struct iommu_ops *ops;
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unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
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iommu_fault_handler_t handler;
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void *handler_token;
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struct iommu_domain_geometry geometry;
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void *iova_cookie;
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bool is_debug_domain;
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char name[IOMMU_DOMAIN_NAME_LEN];
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};
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enum iommu_cap {
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IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
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transactions */
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IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
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IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
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};
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/*
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* Following constraints are specifc to FSL_PAMUV1:
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* -aperture must be power of 2, and naturally aligned
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* -number of windows must be power of 2, and address space size
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* of each window is determined by aperture size / # of windows
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* -the actual size of the mapped region of a window must be power
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* of 2 starting with 4KB and physical address must be naturally
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* aligned.
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* DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
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* The caller can invoke iommu_domain_get_attr to check if the underlying
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* iommu implementation supports these constraints.
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*
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* DOMAIN_ATTR_NO_CFRE
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* Some bus implementations may enter a bad state if iommu reports an error
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* on context fault. As context faults are not always fatal, this must be
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* avoided.
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*/
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enum iommu_attr {
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DOMAIN_ATTR_GEOMETRY,
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DOMAIN_ATTR_PAGING,
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DOMAIN_ATTR_WINDOWS,
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DOMAIN_ATTR_FSL_PAMU_STASH,
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DOMAIN_ATTR_FSL_PAMU_ENABLE,
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DOMAIN_ATTR_FSL_PAMUV1,
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DOMAIN_ATTR_NESTING, /* two stages of translation */
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DOMAIN_ATTR_PT_BASE_ADDR,
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DOMAIN_ATTR_CONTEXT_BANK,
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DOMAIN_ATTR_DYNAMIC,
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DOMAIN_ATTR_TTBR0,
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DOMAIN_ATTR_CONTEXTIDR,
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DOMAIN_ATTR_PROCID,
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DOMAIN_ATTR_NON_FATAL_FAULTS,
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DOMAIN_ATTR_S1_BYPASS,
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DOMAIN_ATTR_ATOMIC,
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DOMAIN_ATTR_SECURE_VMID,
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DOMAIN_ATTR_FAST,
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DOMAIN_ATTR_PGTBL_INFO,
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DOMAIN_ATTR_USE_UPSTREAM_HINT,
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DOMAIN_ATTR_EARLY_MAP,
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DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT,
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DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,
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DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR,
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DOMAIN_ATTR_USE_LLC_NWA,
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DOMAIN_ATTR_FAULT_MODEL_NO_CFRE,
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DOMAIN_ATTR_FAULT_MODEL_NO_STALL,
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DOMAIN_ATTR_FAULT_MODEL_HUPCF,
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DOMAIN_ATTR_MAX,
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};
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/* These are the possible reserved region types */
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enum iommu_resv_type {
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/* Memory regions which must be mapped 1:1 at all times */
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IOMMU_RESV_DIRECT,
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/* Arbitrary "never map this or give it to a device" address ranges */
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IOMMU_RESV_RESERVED,
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/* Hardware MSI region (untranslated) */
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IOMMU_RESV_MSI,
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/* Software-managed MSI translation window */
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IOMMU_RESV_SW_MSI,
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};
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/**
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* struct iommu_resv_region - descriptor for a reserved memory region
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* @list: Linked list pointers
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* @start: System physical start address of the region
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* @length: Length of the region in bytes
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* @prot: IOMMU Protection flags (READ/WRITE/...)
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* @type: Type of the reserved region
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*/
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struct iommu_resv_region {
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struct list_head list;
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phys_addr_t start;
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size_t length;
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int prot;
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enum iommu_resv_type type;
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};
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extern struct dentry *iommu_debugfs_top;
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#ifdef CONFIG_IOMMU_API
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/**
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* struct iommu_ops - iommu ops and capabilities
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* @capable: check capability
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* @domain_alloc: allocate iommu domain
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* @domain_free: free iommu domain
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* @attach_dev: attach device to an iommu domain
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* @detach_dev: detach device from an iommu domain
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* @map: map a physically contiguous memory region to an iommu domain
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* @unmap: unmap a physically contiguous memory region from an iommu domain
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* @map_sg: map a scatter-gather list of physically contiguous memory chunks
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* to an iommu domain
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* @flush_tlb_all: Synchronously flush all hardware TLBs for this domain
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* @tlb_range_add: Add a given iova range to the flush queue for this domain
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* @tlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
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* queue
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* @iova_to_phys: translate iova to physical address
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* @iova_to_phys_hard: translate iova to physical address using IOMMU hardware
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* @add_device: add device to iommu grouping
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* @remove_device: remove device from iommu grouping
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* @device_group: find iommu group for a particular device
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* @domain_get_attr: Query domain attributes
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* @domain_set_attr: Change domain attributes
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* @get_resv_regions: Request list of reserved regions for a device
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* @put_resv_regions: Free list of reserved regions for a device
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* @apply_resv_region: Temporary helper call-back for iova reserved ranges
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* @domain_window_enable: Configure and enable a particular window for a domain
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* @domain_window_disable: Disable a particular window for a domain
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* @domain_set_windows: Set the number of windows for a domain
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* @domain_get_windows: Return the number of windows for a domain
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* @of_xlate: add OF master IDs to iommu grouping
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* @pgsize_bitmap: bitmap of all possible supported page sizes
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* @trigger_fault: trigger a fault on the device attached to an iommu domain
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* @tlbi_domain: Invalidate all TLBs covering an iommu domain
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* @enable_config_clocks: Enable all config clocks for this domain's IOMMU
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* @disable_config_clocks: Disable all config clocks for this domain's IOMMU
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*/
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struct iommu_ops {
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bool (*capable)(enum iommu_cap);
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/* Domain allocation and freeing by the iommu driver */
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struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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void (*domain_free)(struct iommu_domain *);
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova,
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struct scatterlist *sg, unsigned int nents, int prot);
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void (*flush_iotlb_all)(struct iommu_domain *domain);
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void (*iotlb_range_add)(struct iommu_domain *domain,
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unsigned long iova, size_t size);
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void (*iotlb_sync)(struct iommu_domain *domain);
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phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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phys_addr_t (*iova_to_phys_hard)(struct iommu_domain *domain,
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dma_addr_t iova);
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int (*add_device)(struct device *dev);
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void (*remove_device)(struct device *dev);
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struct iommu_group *(*device_group)(struct device *dev);
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int (*domain_get_attr)(struct iommu_domain *domain,
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enum iommu_attr attr, void *data);
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int (*domain_set_attr)(struct iommu_domain *domain,
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enum iommu_attr attr, void *data);
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/* Request/Free a list of reserved regions for a device */
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void (*get_resv_regions)(struct device *dev, struct list_head *list);
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void (*put_resv_regions)(struct device *dev, struct list_head *list);
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void (*apply_resv_region)(struct device *dev,
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struct iommu_domain *domain,
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struct iommu_resv_region *region);
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/* Window handling functions */
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int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t paddr, u64 size, int prot);
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void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
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/* Set the number of windows per domain */
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int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count);
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/* Get the number of windows per domain */
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u32 (*domain_get_windows)(struct iommu_domain *domain);
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void (*trigger_fault)(struct iommu_domain *domain, unsigned long flags);
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void (*tlbi_domain)(struct iommu_domain *domain);
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int (*enable_config_clocks)(struct iommu_domain *domain);
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void (*disable_config_clocks)(struct iommu_domain *domain);
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uint64_t (*iova_to_pte)(struct iommu_domain *domain,
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dma_addr_t iova);
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int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
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bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
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bool (*is_iova_coherent)(struct iommu_domain *domain, dma_addr_t iova);
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unsigned long pgsize_bitmap;
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};
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/**
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* struct iommu_device - IOMMU core representation of one IOMMU hardware
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* instance
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* @list: Used by the iommu-core to keep a list of registered iommus
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* @ops: iommu-ops for talking to this iommu
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* @dev: struct device for sysfs handling
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*/
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struct iommu_device {
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struct list_head list;
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const struct iommu_ops *ops;
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struct fwnode_handle *fwnode;
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struct device *dev;
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};
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int iommu_device_register(struct iommu_device *iommu);
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void iommu_device_unregister(struct iommu_device *iommu);
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int iommu_device_sysfs_add(struct iommu_device *iommu,
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struct device *parent,
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const struct attribute_group **groups,
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const char *fmt, ...) __printf(4, 5);
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void iommu_device_sysfs_remove(struct iommu_device *iommu);
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int iommu_device_link(struct iommu_device *iommu, struct device *link);
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void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
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static inline void iommu_device_set_ops(struct iommu_device *iommu,
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const struct iommu_ops *ops)
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{
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iommu->ops = ops;
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}
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static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
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struct fwnode_handle *fwnode)
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{
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iommu->fwnode = fwnode;
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}
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static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
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{
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return (struct iommu_device *)dev_get_drvdata(dev);
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}
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#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
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#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
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#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
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#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
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#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
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#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
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extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
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extern bool iommu_present(struct bus_type *bus);
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extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
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extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
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extern struct iommu_group *iommu_group_get_by_id(int id);
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extern void iommu_domain_free(struct iommu_domain *domain);
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extern int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev);
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extern void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev);
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extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
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extern size_t iommu_pgsize(unsigned long pgsize_bitmap,
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unsigned long addr_merge, size_t size);
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extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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extern size_t iommu_unmap_fast(struct iommu_domain *domain,
|
||
|
unsigned long iova, size_t size);
|
||
|
extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
|
||
|
struct scatterlist *sg, unsigned int nents,
|
||
|
int prot);
|
||
|
extern size_t default_iommu_map_sg(struct iommu_domain *domain,
|
||
|
unsigned long iova,
|
||
|
struct scatterlist *sg, unsigned int nents,
|
||
|
int prot);
|
||
|
extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
|
||
|
extern phys_addr_t iommu_iova_to_phys_hard(struct iommu_domain *domain,
|
||
|
dma_addr_t iova);
|
||
|
extern bool iommu_is_iova_coherent(struct iommu_domain *domain,
|
||
|
dma_addr_t iova);
|
||
|
extern void iommu_set_fault_handler(struct iommu_domain *domain,
|
||
|
iommu_fault_handler_t handler, void *token);
|
||
|
|
||
|
extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
|
||
|
extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
|
||
|
extern int iommu_request_dm_for_dev(struct device *dev);
|
||
|
extern struct iommu_resv_region *
|
||
|
iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
|
||
|
enum iommu_resv_type type);
|
||
|
extern int iommu_get_group_resv_regions(struct iommu_group *group,
|
||
|
struct list_head *head);
|
||
|
|
||
|
extern int iommu_attach_group(struct iommu_domain *domain,
|
||
|
struct iommu_group *group);
|
||
|
extern void iommu_detach_group(struct iommu_domain *domain,
|
||
|
struct iommu_group *group);
|
||
|
extern struct iommu_group *iommu_group_alloc(void);
|
||
|
extern void *iommu_group_get_iommudata(struct iommu_group *group);
|
||
|
extern void iommu_group_set_iommudata(struct iommu_group *group,
|
||
|
void *iommu_data,
|
||
|
void (*release)(void *iommu_data));
|
||
|
extern int iommu_group_set_name(struct iommu_group *group, const char *name);
|
||
|
extern int iommu_group_add_device(struct iommu_group *group,
|
||
|
struct device *dev);
|
||
|
extern void iommu_group_remove_device(struct device *dev);
|
||
|
extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
|
||
|
int (*fn)(struct device *, void *));
|
||
|
extern struct iommu_group *iommu_group_get(struct device *dev);
|
||
|
extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
|
||
|
extern void iommu_group_put(struct iommu_group *group);
|
||
|
extern int iommu_group_register_notifier(struct iommu_group *group,
|
||
|
struct notifier_block *nb);
|
||
|
extern int iommu_group_unregister_notifier(struct iommu_group *group,
|
||
|
struct notifier_block *nb);
|
||
|
extern int iommu_group_id(struct iommu_group *group);
|
||
|
extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
|
||
|
extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
|
||
|
|
||
|
extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
|
||
|
void *data);
|
||
|
extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
|
||
|
void *data);
|
||
|
|
||
|
/* Window handling function prototypes */
|
||
|
extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
|
||
|
phys_addr_t offset, u64 size,
|
||
|
int prot);
|
||
|
extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
|
||
|
|
||
|
extern uint64_t iommu_iova_to_pte(struct iommu_domain *domain,
|
||
|
dma_addr_t iova);
|
||
|
|
||
|
extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
|
||
|
unsigned long iova, int flags);
|
||
|
|
||
|
static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
|
||
|
{
|
||
|
if (domain->ops->flush_iotlb_all)
|
||
|
domain->ops->flush_iotlb_all(domain);
|
||
|
}
|
||
|
|
||
|
static inline void iommu_tlb_range_add(struct iommu_domain *domain,
|
||
|
unsigned long iova, size_t size)
|
||
|
{
|
||
|
if (domain->ops->iotlb_range_add)
|
||
|
domain->ops->iotlb_range_add(domain, iova, size);
|
||
|
}
|
||
|
|
||
|
static inline void iommu_tlb_sync(struct iommu_domain *domain)
|
||
|
{
|
||
|
if (domain->ops->iotlb_sync)
|
||
|
domain->ops->iotlb_sync(domain);
|
||
|
}
|
||
|
|
||
|
extern void iommu_trigger_fault(struct iommu_domain *domain,
|
||
|
unsigned long flags);
|
||
|
|
||
|
extern unsigned long iommu_reg_read(struct iommu_domain *domain,
|
||
|
unsigned long offset);
|
||
|
extern void iommu_reg_write(struct iommu_domain *domain, unsigned long offset,
|
||
|
unsigned long val);
|
||
|
|
||
|
/* PCI device grouping function */
|
||
|
extern struct iommu_group *pci_device_group(struct device *dev);
|
||
|
/* Generic device grouping function */
|
||
|
extern struct iommu_group *generic_device_group(struct device *dev);
|
||
|
|
||
|
static inline void iommu_tlbiall(struct iommu_domain *domain)
|
||
|
{
|
||
|
if (domain->ops->tlbi_domain)
|
||
|
domain->ops->tlbi_domain(domain);
|
||
|
}
|
||
|
|
||
|
static inline int iommu_enable_config_clocks(struct iommu_domain *domain)
|
||
|
{
|
||
|
if (domain->ops->enable_config_clocks)
|
||
|
return domain->ops->enable_config_clocks(domain);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_disable_config_clocks(struct iommu_domain *domain)
|
||
|
{
|
||
|
if (domain->ops->disable_config_clocks)
|
||
|
domain->ops->disable_config_clocks(domain);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* struct iommu_fwspec - per-device IOMMU instance data
|
||
|
* @ops: ops for this device's IOMMU
|
||
|
* @iommu_fwnode: firmware handle for this device's IOMMU
|
||
|
* @iommu_priv: IOMMU driver private data for this device
|
||
|
* @num_ids: number of associated device IDs
|
||
|
* @ids: IDs which this device may present to the IOMMU
|
||
|
*/
|
||
|
struct iommu_fwspec {
|
||
|
const struct iommu_ops *ops;
|
||
|
struct fwnode_handle *iommu_fwnode;
|
||
|
void *iommu_priv;
|
||
|
unsigned int num_ids;
|
||
|
u32 ids[1];
|
||
|
};
|
||
|
|
||
|
int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
|
||
|
const struct iommu_ops *ops);
|
||
|
void iommu_fwspec_free(struct device *dev);
|
||
|
int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
|
||
|
const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
|
||
|
int iommu_is_available(struct device *dev);
|
||
|
|
||
|
static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
|
||
|
{
|
||
|
return dev->iommu_fwspec;
|
||
|
}
|
||
|
|
||
|
static inline void dev_iommu_fwspec_set(struct device *dev,
|
||
|
struct iommu_fwspec *fwspec)
|
||
|
{
|
||
|
dev->iommu_fwspec = fwspec;
|
||
|
}
|
||
|
|
||
|
#else /* CONFIG_IOMMU_API */
|
||
|
|
||
|
struct iommu_ops {};
|
||
|
struct iommu_group {};
|
||
|
struct iommu_fwspec {};
|
||
|
struct iommu_device {};
|
||
|
|
||
|
static inline bool iommu_present(struct bus_type *bus)
|
||
|
{
|
||
|
return false;
|
||
|
}
|
||
|
|
||
|
static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
|
||
|
{
|
||
|
return false;
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_group *iommu_group_get_by_id(int id)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_domain_free(struct iommu_domain *domain)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_attach_device(struct iommu_domain *domain,
|
||
|
struct device *dev)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_detach_device(struct iommu_domain *domain,
|
||
|
struct device *dev)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
|
||
|
phys_addr_t paddr, size_t size, int prot)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline size_t iommu_unmap(struct iommu_domain *domain,
|
||
|
unsigned long iova, size_t size)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
|
||
|
unsigned long iova, int gfp_order)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline size_t iommu_map_sg(struct iommu_domain *domain,
|
||
|
unsigned long iova, struct scatterlist *sg,
|
||
|
unsigned int nents, int prot)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_tlb_range_add(struct iommu_domain *domain,
|
||
|
unsigned long iova, size_t size)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_tlb_sync(struct iommu_domain *domain)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_domain_window_enable(struct iommu_domain *domain,
|
||
|
u32 wnd_nr, phys_addr_t paddr,
|
||
|
u64 size, int prot)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_domain_window_disable(struct iommu_domain *domain,
|
||
|
u32 wnd_nr)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline phys_addr_t iommu_iova_to_phys_hard(struct iommu_domain *domain,
|
||
|
dma_addr_t iova)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline bool iommu_is_iova_coherent(struct iommu_domain *domain,
|
||
|
dma_addr_t iova)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_set_fault_handler(struct iommu_domain *domain,
|
||
|
iommu_fault_handler_t handler, void *token)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_get_resv_regions(struct device *dev,
|
||
|
struct list_head *list)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_put_resv_regions(struct device *dev,
|
||
|
struct list_head *list)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_get_group_resv_regions(struct iommu_group *group,
|
||
|
struct list_head *head)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_request_dm_for_dev(struct device *dev)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_attach_group(struct iommu_domain *domain,
|
||
|
struct iommu_group *group)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_detach_group(struct iommu_domain *domain,
|
||
|
struct iommu_group *group)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_group *iommu_group_alloc(void)
|
||
|
{
|
||
|
return ERR_PTR(-ENODEV);
|
||
|
}
|
||
|
|
||
|
static inline void *iommu_group_get_iommudata(struct iommu_group *group)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_group_set_iommudata(struct iommu_group *group,
|
||
|
void *iommu_data,
|
||
|
void (*release)(void *iommu_data))
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_set_name(struct iommu_group *group,
|
||
|
const char *name)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_add_device(struct iommu_group *group,
|
||
|
struct device *dev)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_group_remove_device(struct device *dev)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_for_each_dev(struct iommu_group *group,
|
||
|
void *data,
|
||
|
int (*fn)(struct device *, void *))
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_group *iommu_group_get(struct device *dev)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_group_put(struct iommu_group *group)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_register_notifier(struct iommu_group *group,
|
||
|
struct notifier_block *nb)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_unregister_notifier(struct iommu_group *group,
|
||
|
struct notifier_block *nb)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_group_id(struct iommu_group *group)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_domain_get_attr(struct iommu_domain *domain,
|
||
|
enum iommu_attr attr, void *data)
|
||
|
{
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_domain_set_attr(struct iommu_domain *domain,
|
||
|
enum iommu_attr attr, void *data)
|
||
|
{
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_device_register(struct iommu_device *iommu)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_device_set_ops(struct iommu_device *iommu,
|
||
|
const struct iommu_ops *ops)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
|
||
|
struct fwnode_handle *fwnode)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_device_unregister(struct iommu_device *iommu)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
|
||
|
struct device *parent,
|
||
|
const struct attribute_group **groups,
|
||
|
const char *fmt, ...)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_device_link(struct device *dev, struct device *link)
|
||
|
{
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_device_unlink(struct device *dev, struct device *link)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_trigger_fault(struct iommu_domain *domain,
|
||
|
unsigned long flags)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline unsigned long iommu_reg_read(struct iommu_domain *domain,
|
||
|
unsigned long offset)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_reg_write(struct iommu_domain *domain,
|
||
|
unsigned long val, unsigned long offset)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline void iommu_tlbiall(struct iommu_domain *domain)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_enable_config_clocks(struct iommu_domain *domain)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_disable_config_clocks(struct iommu_domain *domain)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_fwspec_init(struct device *dev,
|
||
|
struct fwnode_handle *iommu_fwnode,
|
||
|
const struct iommu_ops *ops)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline void iommu_fwspec_free(struct device *dev)
|
||
|
{
|
||
|
}
|
||
|
|
||
|
static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
|
||
|
int num_ids)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
static inline
|
||
|
const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
|
||
|
{
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
static inline int iommu_is_available(struct device *dev)
|
||
|
{
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
#endif /* CONFIG_IOMMU_API */
|
||
|
|
||
|
#ifdef CONFIG_IOMMU_DEBUGFS
|
||
|
extern struct dentry *iommu_debugfs_dir;
|
||
|
void iommu_debugfs_setup(void);
|
||
|
#else
|
||
|
static inline void iommu_debugfs_setup(void) {}
|
||
|
#endif
|
||
|
|
||
|
#endif /* __LINUX_IOMMU_H */
|