27 lines
688 B
Plaintext
27 lines
688 B
Plaintext
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Allwinner SoCs High Speed Timer Controller
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Required properties:
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- compatible : should be "allwinner,sun5i-a13-hstimer" or
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"allwinner,sun7i-a20-hstimer"
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- reg : Specifies base physical address and size of the registers.
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- interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
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one)
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- clocks: phandle to the source clock (usually the AHB clock)
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Optional properties:
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- resets: phandle to a reset controller asserting the timer
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Example:
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timer@1c60000 {
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compatible = "allwinner,sun7i-a20-hstimer";
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reg = <0x01c60000 0x1000>;
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interrupts = <0 51 1>,
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<0 52 1>,
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<0 53 1>,
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<0 54 1>;
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clocks = <&ahb1_gates 19>;
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resets = <&ahb1rst 19>;
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};
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