395 lines
9.9 KiB
C
395 lines
9.9 KiB
C
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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* Copyright 2011 Freescale Semiconductor, Inc.
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/jiffies.h>
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#include <linux/hrtimer.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm_host.h>
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#include <linux/clockchips.h>
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#include <asm/reg.h>
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#include <asm/time.h>
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#include <asm/byteorder.h>
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include <asm/ppc-opcode.h>
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#include <asm/sstep.h>
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#include "timing.h"
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#include "trace.h"
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#ifdef CONFIG_PPC_FPU
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static bool kvmppc_check_fp_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_FP)) {
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kvmppc_core_queue_fpunavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_PPC_FPU */
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#ifdef CONFIG_VSX
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static bool kvmppc_check_vsx_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VSX)) {
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kvmppc_core_queue_vsx_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_ALTIVEC
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static bool kvmppc_check_altivec_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VEC)) {
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kvmppc_core_queue_vec_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_ALTIVEC */
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/*
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* XXX to do:
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* lfiwax, lfiwzx
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* vector loads and stores
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*
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* Instructions that trap when used on cache-inhibited mappings
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* are not emulated here: multiple and string instructions,
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* lq/stq, and the load-reserve/store-conditional instructions.
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*/
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int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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u32 inst;
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int ra, rs, rt;
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enum emulation_result emulated = EMULATE_FAIL;
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int advance = 1;
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struct instruction_op op;
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/* this default type might be overwritten by subcategories */
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kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
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emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
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if (emulated != EMULATE_DONE)
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return emulated;
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ra = get_ra(inst);
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rs = get_rs(inst);
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rt = get_rt(inst);
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/*
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* if mmio_vsx_tx_sx_enabled == 0, copy data between
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* VSR[0..31] and memory
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* if mmio_vsx_tx_sx_enabled == 1, copy data between
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* VSR[32..63] and memory
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*/
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vcpu->arch.mmio_vsx_copy_nums = 0;
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vcpu->arch.mmio_vsx_offset = 0;
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vcpu->arch.mmio_copy_type = KVMPPC_VSX_COPY_NONE;
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vcpu->arch.mmio_sp64_extend = 0;
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vcpu->arch.mmio_sign_extend = 0;
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vcpu->arch.mmio_vmx_copy_nums = 0;
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vcpu->arch.mmio_vmx_offset = 0;
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vcpu->arch.mmio_host_swabbed = 0;
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emulated = EMULATE_FAIL;
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vcpu->arch.regs.msr = vcpu->arch.shared->msr;
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if (analyse_instr(&op, &vcpu->arch.regs, inst) == 0) {
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int type = op.type & INSTR_TYPE_MASK;
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int size = GETSIZE(op.type);
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switch (type) {
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case LOAD: {
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int instr_byte_swap = op.type & BYTEREV;
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(run, vcpu,
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op.reg, size, !instr_byte_swap);
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else
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emulated = kvmppc_handle_load(run, vcpu,
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op.reg, size, !instr_byte_swap);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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}
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#ifdef CONFIG_PPC_FPU
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case LOAD_FP:
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if (kvmppc_check_fp_disabled(vcpu))
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return EMULATE_DONE;
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if (op.type & FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(run, vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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else
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emulated = kvmppc_handle_load(run, vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#endif
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#ifdef CONFIG_ALTIVEC
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case LOAD_VMX:
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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/* Hardware enforces alignment of VMX accesses */
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vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
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vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
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if (size == 16) { /* lvx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_DWORD;
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} else if (size == 4) { /* lvewx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_WORD;
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} else if (size == 2) { /* lvehx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_HWORD;
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} else if (size == 1) { /* lvebx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_BYTE;
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} else
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break;
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vcpu->arch.mmio_vmx_offset =
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(vcpu->arch.vaddr_accessed & 0xf)/size;
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if (size == 16) {
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vcpu->arch.mmio_vmx_copy_nums = 2;
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emulated = kvmppc_handle_vmx_load(run,
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vcpu, KVM_MMIO_REG_VMX|op.reg,
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8, 1);
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} else {
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vcpu->arch.mmio_vmx_copy_nums = 1;
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emulated = kvmppc_handle_vmx_load(run, vcpu,
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KVM_MMIO_REG_VMX|op.reg,
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size, 1);
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}
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break;
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#endif
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#ifdef CONFIG_VSX
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case LOAD_VSX: {
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int io_size_each;
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if (op.vsx_flags & VSX_CHECK_VEC) {
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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} else {
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if (kvmppc_check_vsx_disabled(vcpu))
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return EMULATE_DONE;
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}
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if (op.vsx_flags & VSX_FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.element_size == 8) {
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if (op.vsx_flags & VSX_SPLAT)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD_LOAD_DUMP;
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else
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD;
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} else if (op.element_size == 4) {
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if (op.vsx_flags & VSX_SPLAT)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD_LOAD_DUMP;
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else
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD;
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} else
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break;
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if (size < op.element_size) {
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/* precision convert case: lxsspx, etc */
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vcpu->arch.mmio_vsx_copy_nums = 1;
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io_size_each = size;
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} else { /* lxvw4x, lxvd2x, etc */
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vcpu->arch.mmio_vsx_copy_nums =
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size/op.element_size;
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io_size_each = op.element_size;
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}
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emulated = kvmppc_handle_vsx_load(run, vcpu,
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KVM_MMIO_REG_VSX|op.reg, io_size_each,
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1, op.type & SIGNEXT);
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break;
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}
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#endif
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case STORE:
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/* if need byte reverse, op.val has been reversed by
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* analyse_instr().
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*/
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emulated = kvmppc_handle_store(run, vcpu, op.val,
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size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#ifdef CONFIG_PPC_FPU
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case STORE_FP:
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if (kvmppc_check_fp_disabled(vcpu))
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return EMULATE_DONE;
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/* The FP registers need to be flushed so that
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* kvmppc_handle_store() can read actual FP vals
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* from vcpu->arch.
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*/
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_FP);
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if (op.type & FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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emulated = kvmppc_handle_store(run, vcpu,
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VCPU_FPR(vcpu, op.reg), size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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#endif
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#ifdef CONFIG_ALTIVEC
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case STORE_VMX:
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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/* Hardware enforces alignment of VMX accesses. */
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vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
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vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_VEC);
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if (size == 16) { /* stvx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_DWORD;
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} else if (size == 4) { /* stvewx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_WORD;
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} else if (size == 2) { /* stvehx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_HWORD;
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} else if (size == 1) { /* stvebx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_BYTE;
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} else
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break;
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vcpu->arch.mmio_vmx_offset =
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(vcpu->arch.vaddr_accessed & 0xf)/size;
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if (size == 16) {
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vcpu->arch.mmio_vmx_copy_nums = 2;
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emulated = kvmppc_handle_vmx_store(run,
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vcpu, op.reg, 8, 1);
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} else {
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vcpu->arch.mmio_vmx_copy_nums = 1;
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emulated = kvmppc_handle_vmx_store(run,
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vcpu, op.reg, size, 1);
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}
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break;
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#endif
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#ifdef CONFIG_VSX
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case STORE_VSX: {
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int io_size_each;
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if (op.vsx_flags & VSX_CHECK_VEC) {
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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} else {
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if (kvmppc_check_vsx_disabled(vcpu))
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return EMULATE_DONE;
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}
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if (vcpu->kvm->arch.kvm_ops->giveup_ext)
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vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
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MSR_VSX);
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if (op.vsx_flags & VSX_FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.element_size == 8)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_DWORD;
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else if (op.element_size == 4)
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vcpu->arch.mmio_copy_type =
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KVMPPC_VSX_COPY_WORD;
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else
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break;
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|
if (size < op.element_size) {
|
||
|
|
/* precise conversion case, like stxsspx */
|
||
|
|
vcpu->arch.mmio_vsx_copy_nums = 1;
|
||
|
|
io_size_each = size;
|
||
|
|
} else { /* stxvw4x, stxvd2x, etc */
|
||
|
|
vcpu->arch.mmio_vsx_copy_nums =
|
||
|
|
size/op.element_size;
|
||
|
|
io_size_each = op.element_size;
|
||
|
|
}
|
||
|
|
|
||
|
|
emulated = kvmppc_handle_vsx_store(run, vcpu,
|
||
|
|
op.reg, io_size_each, 1);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
case CACHEOP:
|
||
|
|
/* Do nothing. The guest is performing dcbi because
|
||
|
|
* hardware DMA is not snooped by the dcache, but
|
||
|
|
* emulated DMA either goes through the dcache as
|
||
|
|
* normal writes, or the host kernel has handled dcache
|
||
|
|
* coherence.
|
||
|
|
*/
|
||
|
|
emulated = EMULATE_DONE;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
if (emulated == EMULATE_FAIL) {
|
||
|
|
advance = 0;
|
||
|
|
kvmppc_core_queue_program(vcpu, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
|
||
|
|
|
||
|
|
/* Advance past emulated instruction. */
|
||
|
|
if (advance)
|
||
|
|
kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
|
||
|
|
|
||
|
|
return emulated;
|
||
|
|
}
|