485 lines
12 KiB
C
485 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/printk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <mt-plat/sync_write.h>
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#include <mt-plat/mtk_io.h>
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#include <dbgtop.h>
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static void __iomem *DBGTOP_BASE;
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static unsigned int LATCH_CTL2_OFFSET;
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/*indicate have dbgtop hw*/
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static int found_dbgtop_base;
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static int mtk_dbgtop_probe(struct platform_device *pdev);
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static int mtk_dbgtop_remove(struct platform_device *dev)
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{
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id mtk_dbgtop_of_ids[] = {
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{.compatible = "mediatek,dbgtop",},
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{}
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};
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#endif
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static struct platform_driver mtk_dbgtop = {
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.probe = mtk_dbgtop_probe,
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.remove = mtk_dbgtop_remove,
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.driver = {
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.name = "mtk_dbgtop",
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.owner = THIS_MODULE,
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#ifdef CONFIG_OF
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.of_match_table = mtk_dbgtop_of_ids,
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#endif
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},
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};
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static int mtk_dbgtop_probe(struct platform_device *pdev)
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{
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struct resource *res;
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if (DBGTOP_BASE) {
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pr_info("%s: already got the base addr\n", __func__);
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return 0;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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DBGTOP_BASE = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(DBGTOP_BASE)) {
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pr_info("[DBGTOP] unable to map DBGTOP_BASE");
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return -EINVAL;
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}
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return 0;
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}
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static ssize_t dbgtop_config_show(struct device_driver *driver, char *buf)
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{
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ssize_t ret = 0;
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if (found_dbgtop_base) {
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"%s,0x%x\n%s,0x%x\n%s,0x%x\n%s,0x%x\n",
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"MTK_DBGTOP_MODE", readl(IOMEM(MTK_DBGTOP_MODE)),
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"MTK_DBGTOP_LATCH_CTL", readl(IOMEM(MTK_DBGTOP_LATCH_CTL)),
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"MTK_DBGTOP_DEBUG_CTL", readl(IOMEM(MTK_DBGTOP_DEBUG_CTL)),
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"MTK_DBGTOP_DEBUG_CTL2", readl(IOMEM(MTK_DBGTOP_DEBUG_CTL2)));
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} else {
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"%s,0x%x\n%s,0x%x\n%s,0x%x\n%s,0x%x\n",
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"MTK_DBGTOP_MODE", readl(IOMEM(MTK_DBGTOP_MODE)),
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"MTK_DBGTOP_LATCH_CTL", readl(IOMEM(MTK_RGU_LATCH_CTL)),
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"MTK_DBGTOP_DEBUG_CTL", readl(IOMEM(MTK_RGU_DEBUG_CTL)),
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"MTK_DBGTOP_DEBUG_CTL2", readl(IOMEM(MTK_RGU_DEBUG_CTL2)));
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}
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return strlen(buf);
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}
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static ssize_t dbgtop_config_store
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(struct device_driver *driver, const char *buf, size_t count)
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{
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#if MTK_DBGTOP_TEST
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char *ptr;
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char *command;
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if ((strlen(buf) + 1) > DBGTOP_MAX_CMD_LEN) {
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pr_info("[DBGTOP] store command overflow\n");
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return count;
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}
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command = kmalloc((size_t) DBGTOP_MAX_CMD_LEN, GFP_KERNEL);
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if (!command)
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return count;
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strncpy(command, buf, (size_t) DBGTOP_MAX_CMD_LEN);
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ptr = strsep(&command, " ");
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if (!strncmp(buf, "0", strlen("0"))) {
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mtk_dbgtop_dram_reserved(0);
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mtk_dbgtop_cfg_dvfsrc(0);
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mtk_dbgtop_pause_dvfsrc(0);
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goto dbgtop_config_store;
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} else if (!strncmp(buf, "1", strlen("1"))) {
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mtk_dbgtop_dram_reserved(1);
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mtk_dbgtop_cfg_dvfsrc(1);
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mtk_dbgtop_pause_dvfsrc(1);
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}
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dbgtop_config_store:
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kfree(command);
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#endif
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return count;
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}
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static DRIVER_ATTR_RW(dbgtop_config);
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/*
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* emi_ctrl_init: module init function.
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*/
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static int __init mtk_dbgtop_init(void)
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{
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int ret;
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/* register DBGTOP interface */
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ret = platform_driver_register(&mtk_dbgtop);
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if (ret)
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pr_info("[DBGTOP] fail to register mtk_dbgtop driver");
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ret = driver_create_file(&mtk_dbgtop.driver,
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&driver_attr_dbgtop_config);
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if (ret)
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pr_info("[DBGTOP] fail to create dbgtop_config");
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return 0;
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}
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/*
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* mtk_dbgtop_exit: module exit function.
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*/
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static void __exit mtk_dbgtop_exit(void)
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{
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}
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int mtk_dbgtop_dram_reserved(int enable)
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{
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unsigned int tmp, ddr_reserve_mode;
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if (DBGTOP_BASE == NULL)
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return -1;
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if (found_dbgtop_base)
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ddr_reserve_mode = MTK_DBGTOP_MODE_DDR_RESERVE;
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else
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ddr_reserve_mode = MTK_RGU_MODE_DDR_RESERVE;
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if (enable == 1) {
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/* enable DDR reserved mode */
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tmp = readl(IOMEM(MTK_DBGTOP_MODE));
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tmp |= (ddr_reserve_mode | MTK_DBGTOP_MODE_KEY);
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mt_reg_sync_writel(tmp, MTK_DBGTOP_MODE);
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} else if (enable == 0) {
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/* disable DDR reserved mode */
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tmp = readl(IOMEM(MTK_DBGTOP_MODE));
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tmp &= (~ddr_reserve_mode);
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tmp |= MTK_DBGTOP_MODE_KEY;
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mt_reg_sync_writel(tmp, MTK_DBGTOP_MODE);
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}
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pr_info("%s: MTK_DBGTOP_MODE(0x%x)\n",
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__func__, readl(IOMEM(MTK_DBGTOP_MODE)));
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return 0;
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}
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EXPORT_SYMBOL(mtk_dbgtop_dram_reserved);
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int mtk_dbgtop_cfg_dvfsrc(int enable)
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{
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unsigned int debug_ctl2, latch_ctl;
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void __iomem *latch_ctl_base, *debug_ctl2_base;
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if (DBGTOP_BASE == NULL)
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return -1;
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if (found_dbgtop_base) {
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latch_ctl_base = MTK_DBGTOP_LATCH_CTL;
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debug_ctl2_base = MTK_DBGTOP_DEBUG_CTL2;
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} else {
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latch_ctl_base = MTK_RGU_LATCH_CTL;
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debug_ctl2_base = MTK_RGU_LATCH_CTL2;
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}
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debug_ctl2 = readl(IOMEM(debug_ctl2_base));
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latch_ctl = readl(IOMEM(latch_ctl_base));
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if (enable == 1) {
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/* enable dvfsrc_en */
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debug_ctl2 |= MTK_DBGTOP_DVFSRC_EN;
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/* set dvfsrc_latch */
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latch_ctl |= MTK_DBGTOP_DVFSRC_LATCH_EN;
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} else {
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/* disable is not allowed */
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return -1;
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}
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debug_ctl2 |= MTK_DBGTOP_DEBUG_CTL2_KEY;
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mt_reg_sync_writel(debug_ctl2, debug_ctl2_base);
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latch_ctl |= MTK_DBGTOP_LATCH_CTL_KEY;
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mt_reg_sync_writel(latch_ctl, latch_ctl_base);
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pr_info("%s: MTK_DBGTOP_DEBUG_CTL2(0x%x)\n",
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__func__, readl(IOMEM(debug_ctl2_base)));
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pr_info("%s: MTK_DBGTOP_LATCH_CTL(0x%x)\n",
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__func__, readl(IOMEM(latch_ctl_base)));
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return 0;
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}
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EXPORT_SYMBOL(mtk_dbgtop_cfg_dvfsrc);
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int mtk_dbgtop_pause_dvfsrc(int enable)
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{
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unsigned int tmp, dvfsrc_pause_pulse;
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unsigned int count = 100;
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void __iomem *debug_ctl_base, *debug_ctl2_base;
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if (DBGTOP_BASE == NULL)
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return -1;
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if (found_dbgtop_base) {
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dvfsrc_pause_pulse = MTK_DBGTOP_DVFSRC_PAUSE_PULSE;
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debug_ctl_base = MTK_DBGTOP_DEBUG_CTL;
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debug_ctl2_base = MTK_DBGTOP_DEBUG_CTL2;
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} else {
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#if defined(CONFIG_MACH_MT6779) || defined(CONFIG_MACH_MT6768) \
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|| defined(CONFIG_MACH_MT6785) || defined(CONFIG_MACH_MT6781)
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dvfsrc_pause_pulse = MTK_RGU_DVFSRC_PAUSE_PULSE;
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debug_ctl_base = MTK_RGU_DEBUG_CTL;
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debug_ctl2_base = MTK_RGU_DEBUG_CTL2;
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#else
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pr_info("%s: not support the function\n", __func__);
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return -ENODEV;
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#endif
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}
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if (!(readl(IOMEM(debug_ctl2_base))
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& MTK_DBGTOP_DVFSRC_EN)) {
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pr_info("%s: not enable DVFSRC\n", __func__);
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return 0;
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}
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if (enable == 1) {
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/* enable DVFSRC pause */
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tmp = readl(IOMEM(debug_ctl_base));
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tmp |= dvfsrc_pause_pulse;
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tmp |= MTK_DBGTOP_DEBUG_CTL_KEY;
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mt_reg_sync_writel(tmp, debug_ctl_base);
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while (count--) {
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if ((readl(IOMEM(debug_ctl_base))
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& MTK_DBGTOP_DVFSRC_SUCECESS_ACK))
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break;
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udelay(10);
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}
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pr_info("%s: DVFSRC pause result(0x%x)\n",
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__func__, readl(IOMEM(debug_ctl_base)));
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} else if (enable == 0) {
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/* disable DVFSRC pause */
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tmp = readl(IOMEM(debug_ctl_base));
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tmp &= (~dvfsrc_pause_pulse);
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tmp |= MTK_DBGTOP_DEBUG_CTL_KEY;
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mt_reg_sync_writel(tmp, debug_ctl_base);
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}
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pr_info("%s: MTK_DBGTOP_DEBUG_CTL(0x%x)\n",
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__func__, readl(IOMEM(debug_ctl_base)));
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return 0;
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}
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EXPORT_SYMBOL(mtk_dbgtop_pause_dvfsrc);
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static int __init mtk_dbgtop_get_base_addr(void)
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{
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struct device_node *np_dbgtop;
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for_each_matching_node(np_dbgtop, mtk_dbgtop_of_ids) {
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pr_info("%s: compatible node found: %s\n",
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__func__, np_dbgtop->name);
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found_dbgtop_base = 1;
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break;
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}
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if (!DBGTOP_BASE && found_dbgtop_base) {
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DBGTOP_BASE = of_iomap(np_dbgtop, 0);
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if (!DBGTOP_BASE)
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pr_info("%s: dbgtop iomap failed\n", __func__);
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} else if (!DBGTOP_BASE) {
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np_dbgtop = of_find_compatible_node(NULL, NULL, "mediatek,toprgu");
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DBGTOP_BASE = of_iomap(np_dbgtop, 0);
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if (!DBGTOP_BASE)
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pr_info("%s: dbgtop iomap failed\n", __func__);
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pr_info("use toprgu to setting\n");
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}
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return 0;
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}
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void get_dfd_base(void __iomem *dfd_base, unsigned int latch_offset)
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{
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LATCH_CTL2_OFFSET = latch_offset;
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if (!DBGTOP_BASE)
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pr_info("link RGU base failed.\n");
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pr_info("Linked base: 0x%x\n", readl(IOMEM(DBGTOP_BASE)));
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}
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EXPORT_SYMBOL(get_dfd_base);
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int mtk_dbgtop_dfd_count_en(int value)
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{
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unsigned int tmp;
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/* dfd_count_en is obsolete, enable dfd_en only here */
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if (value == 1) {
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/* enable dfd_en */
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tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
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tmp |= (MTK_DBGTOP_DFD_EN | MTK_DBGTOP_LATCH_CTL2_KEY);
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mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
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} else if (value == 0) {
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/* disable dfd_en */
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tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
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tmp &= ~MTK_DBGTOP_DFD_EN;
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tmp |= MTK_DBGTOP_LATCH_CTL2_KEY;
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mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
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#if defined(CONFIG_MACH_MT6781)
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tmp = 0;
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tmp |= MTK_DBGTOP_LATCH_CTL2_KEY;
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mt_reg_sync_writel(tmp, MTK_RGU_MFG_EN);
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#endif
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}
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|
|
||
|
|
pr_info("%s: MTK_DBGTOP_LATCH_CTL2(0x%x)\n", __func__,
|
||
|
|
readl(IOMEM(MTK_DBGTOP_LATCH_CTL2)));
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_dfd_count_en);
|
||
|
|
|
||
|
|
int mtk_dbgtop_dfd_therm1_dis(int value)
|
||
|
|
{
|
||
|
|
unsigned int tmp;
|
||
|
|
|
||
|
|
if (value == 1) {
|
||
|
|
/* enable dfd count */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
|
||
|
|
tmp |= MTK_DBGTOP_DFD_THERM1_DIS | MTK_DBGTOP_LATCH_CTL2_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
|
||
|
|
} else if (value == 0) {
|
||
|
|
/* disable dfd count */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
|
||
|
|
tmp &= ~MTK_DBGTOP_DFD_THERM1_DIS;
|
||
|
|
tmp |= MTK_DBGTOP_LATCH_CTL2_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
|
||
|
|
}
|
||
|
|
|
||
|
|
pr_info("%s: MTK_DBGTOP_LATCH_CTL2(0x%x)\n", __func__,
|
||
|
|
readl(IOMEM(MTK_DBGTOP_LATCH_CTL2)));
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_dfd_therm1_dis);
|
||
|
|
|
||
|
|
int mtk_dbgtop_dfd_therm2_dis(int value)
|
||
|
|
{
|
||
|
|
unsigned int tmp;
|
||
|
|
|
||
|
|
if (value == 1) {
|
||
|
|
/* enable dfd count */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
|
||
|
|
tmp |= MTK_DBGTOP_DFD_THERM2_DIS | MTK_DBGTOP_LATCH_CTL2_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
|
||
|
|
} else if (value == 0) {
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
|
||
|
|
tmp &= ~MTK_DBGTOP_DFD_THERM2_DIS;
|
||
|
|
tmp |= MTK_DBGTOP_LATCH_CTL2_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
|
||
|
|
}
|
||
|
|
|
||
|
|
pr_info("%s: MTK_DBGTOP_LATCH_CTL2(0x%x)\n", __func__,
|
||
|
|
readl(IOMEM(MTK_DBGTOP_LATCH_CTL2)));
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_dfd_therm2_dis);
|
||
|
|
|
||
|
|
int mtk_dbgtop_dfd_timeout(int value)
|
||
|
|
{
|
||
|
|
unsigned int tmp;
|
||
|
|
|
||
|
|
pr_debug("%s: before MTK_DBGTOP_LATCH_CTL2(0x%x)\n", __func__,
|
||
|
|
readl(IOMEM(MTK_DBGTOP_LATCH_CTL2)));
|
||
|
|
value <<= MTK_DBGTOP_DFD_TIMEOUT_SHIFT;
|
||
|
|
value &= MTK_DBGTOP_DFD_TIMEOUT_MASK;
|
||
|
|
/* break if dfd timeout >= target value */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_LATCH_CTL2));
|
||
|
|
|
||
|
|
/* set dfd timeout */
|
||
|
|
tmp &= ~MTK_DBGTOP_DFD_TIMEOUT_MASK;
|
||
|
|
tmp |= value | MTK_DBGTOP_LATCH_CTL2_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_LATCH_CTL2);
|
||
|
|
|
||
|
|
pr_debug("%s: MTK_DBGTOP_LATCH_CTL2(0x%x)\n", __func__,
|
||
|
|
readl(IOMEM(MTK_DBGTOP_LATCH_CTL2)));
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_dfd_timeout);
|
||
|
|
|
||
|
|
int mtk_dbgtop_mfg_pwr_on(int value)
|
||
|
|
{
|
||
|
|
unsigned int tmp;
|
||
|
|
|
||
|
|
if (!DBGTOP_BASE || !found_dbgtop_base)
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
if (value == 1) {
|
||
|
|
/* set mfg pwr on */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_MFG_REG));
|
||
|
|
tmp |= MTK_DBGTOP_MFG_PWR_ON;
|
||
|
|
tmp |= MTK_DBGTOP_MFG_REG_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_MFG_REG);
|
||
|
|
} else if (value == 0) {
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_MFG_REG));
|
||
|
|
tmp &= ~MTK_DBGTOP_MFG_PWR_ON;
|
||
|
|
tmp |= MTK_DBGTOP_MFG_REG_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_MFG_REG);
|
||
|
|
} else
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_mfg_pwr_on);
|
||
|
|
|
||
|
|
int mtk_dbgtop_mfg_pwr_en(int value)
|
||
|
|
{
|
||
|
|
unsigned int tmp;
|
||
|
|
|
||
|
|
if (!DBGTOP_BASE || !found_dbgtop_base)
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
if (value == 1) {
|
||
|
|
/* set mfg pwr en */
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_MFG_REG));
|
||
|
|
tmp |= MTK_DBGTOP_MFG_PWR_EN;
|
||
|
|
tmp |= MTK_DBGTOP_MFG_REG_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_MFG_REG);
|
||
|
|
} else if (value == 0) {
|
||
|
|
tmp = readl(IOMEM(MTK_DBGTOP_MFG_REG));
|
||
|
|
tmp &= ~MTK_DBGTOP_MFG_PWR_EN;
|
||
|
|
tmp |= MTK_DBGTOP_MFG_REG_KEY;
|
||
|
|
mt_reg_sync_writel(tmp, MTK_DBGTOP_MFG_REG);
|
||
|
|
} else
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(mtk_dbgtop_mfg_pwr_en);
|
||
|
|
|
||
|
|
core_initcall(mtk_dbgtop_get_base_addr);
|
||
|
|
module_init(mtk_dbgtop_init);
|
||
|
|
module_exit(mtk_dbgtop_exit);
|
||
|
|
|