455 lines
11 KiB
C
455 lines
11 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*/
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#ifndef __CCCI_MODEM_H__
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#define __CCCI_MODEM_H__
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#include "mt-plat/mtk_ccci_common.h"
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enum MD_FORCE_ASSERT_TYPE {
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MD_FORCE_ASSERT_RESERVE = 0x000,
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MD_FORCE_ASSERT_BY_MD_NO_RESPONSE = 0x100,
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MD_FORCE_ASSERT_BY_MD_SEQ_ERROR = 0x200,
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MD_FORCE_ASSERT_BY_AP_Q0_BLOCKED = 0x300,
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MD_FORCE_ASSERT_BY_USER_TRIGGER = 0x400,
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MD_FORCE_ASSERT_BY_MD_WDT = 0x500,
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MD_FORCE_ASSERT_BY_AP_MPU = 0x600,
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};
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enum MODEM_DUMP_FLAG {
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DUMP_FLAG_CCIF = (1 << 0), /* dump ccif sw data. */
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/* tricky part, use argument length as queue index */
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DUMP_FLAG_CLDMA = (1 << 1),
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DUMP_FLAG_REG = (1 << 2), /* dump modem reg. */
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DUMP_FLAG_SMEM_EXP = (1 << 3),
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DUMP_FLAG_IMAGE = (1 << 4),
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DUMP_FLAG_LAYOUT = (1 << 5),
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DUMP_FLAG_QUEUE_0 = (1 << 6),
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DUMP_FLAG_QUEUE_0_1 = (1 << 7),
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DUMP_FLAG_CCIF_REG = (1 << 8), /* dump ccif reg. */
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DUMP_FLAG_SMEM_MDSLP = (1 << 9),
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DUMP_FLAG_MD_WDT = (1 << 10),
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DUMP_FLAG_SMEM_CCISM = (1<<11),
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DUMP_MD_BOOTUP_STATUS = (1<<12),
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DUMP_FLAG_IRQ_STATUS = (1<<13),
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DUMP_FLAG_SMEM_CCB_CTRL = (1<<14),
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DUMP_FLAG_SMEM_CCB_DATA = (1<<15),
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DUMP_FLAG_PCCIF_REG = (1 << 16),
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DUMP_FLAG_GET_TRAFFIC = (1 << 18),
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};
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enum {
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MD_DBG_DUMP_INVALID = -1,
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/*AP side reg 0~15*/
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MD_DBG_DUMP_PCMON = 0,
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MD_DBG_DUMP_BUSREC,
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MD_DBG_DUMP_BUS,
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MD_DBG_DUMP_PLL,
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MD_DBG_DUMP_ECT,
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MD_DBG_DUMP_SMEM,
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/*md side reg 16~23*/
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MD_DBG_DUMP_TOPSM = 16,
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MD_DBG_DUMP_MDRGU,
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MD_DBG_DUMP_OST,
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/*misc*/
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MD_DBG_DUMP_PORT = 24,
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/*bit map*/
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MD_DBG_DUMP_AP_REG = 0xFFFF,
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MD_DBG_DUMP_ALL = 0x7FFFFFFF,
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};
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enum MD_BOOT_MODE {
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MD_BOOT_MODE_INVALID = 0,
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MD_BOOT_MODE_NORMAL,
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MD_BOOT_MODE_META,
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MD_BOOT_MODE_MAX,
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};
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enum {
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MD_CFG_MDLOG_MODE,
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MD_CFG_SBP_CODE,
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MD_CFG_DUMP_FLAG,
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MD_CFG_SBP_SUB_ID,
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MD_CFG_RAT_CHK_FLAG,
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MD_CFG_RAT_STR0,
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MD_CFG_RAT_STR1,
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MD_CFG_RAT_STR2,
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MD_CFG_RAT_STR3,
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MD_CFG_RAT_STR4,
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MD_CFG_RAT_STR5,
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MD_CFG_WM_IDX,
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MD_CFG_LOG_LEVEL,
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};
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enum {
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ALL_CCIF = 0,
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AP_MD1_CCIF,
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AP_MD3_CCIF,
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MD1_MD3_CCIF,
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};
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enum {
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AP_MD_HS_V2 = 2,
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};
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enum {
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SMF_CLR_RESET = (1 << 0), /* clear when reset modem */
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SMF_NCLR_FIRST = (1 << 1), /* do not clear even in MD first boot up */
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SMF_MD3_RELATED = (1 << 2), /* MD3 related share memory */
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};
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struct ccci_mem_region {
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phys_addr_t base_md_view_phy;
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phys_addr_t base_ap_view_phy;
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void __iomem *base_ap_view_vir;
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unsigned int size;
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};
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struct ccci_smem_region {
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/* pre-defined */
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unsigned int id;
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unsigned int offset; /* in bank4 */
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unsigned int size;
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unsigned int flag;
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/* runtime calculated */
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phys_addr_t base_md_view_phy;
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phys_addr_t base_ap_view_phy;
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void __iomem *base_ap_view_vir;
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};
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struct ccci_mem_layout {
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/* MD RO and RW (bank0) */
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struct ccci_mem_region md_bank0;
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/* share memory (bank4) */
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struct ccci_mem_region md_bank4_noncacheable_total;
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struct ccci_mem_region md_bank4_cacheable_total;
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/* share memory detail */
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struct ccci_smem_region *md_bank4_noncacheable;
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struct ccci_smem_region *md_bank4_cacheable;
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};
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enum{
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CCCI_FEATURE_NOT_EXIST = 0,
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CCCI_FEATURE_NOT_SUPPORT = 1,
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CCCI_FEATURE_MUST_SUPPORT = 2,
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CCCI_FEATURE_OPTIONAL_SUPPORT = 3,
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CCCI_FEATURE_SUPPORT_BACKWARD_COMPAT = 4,
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}; /* CCCI_RUNTIME_FEATURE_SUPPORT_TYPE */
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enum{
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BOOT_INFO = 0,
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EXCEPTION_SHARE_MEMORY,
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CCIF_SHARE_MEMORY,
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SMART_LOGGING_SHARE_MEMORY,
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MD1MD3_SHARE_MEMORY,
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/*ccci misc info*/
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MISC_INFO_HIF_DMA_REMAP,
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MISC_INFO_RTC_32K_LESS,
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MISC_INFO_RANDOM_SEED_NUM,
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MISC_INFO_GPS_COCLOCK,
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MISC_INFO_SBP_ID,
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MISC_INFO_CCCI, /*=10*/
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MISC_INFO_CLIB_TIME,
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MISC_INFO_C2K,
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MD_IMAGE_START_MEMORY,
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CCISM_SHARE_MEMORY,
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CCB_SHARE_MEMORY, /* total size of all CCB regions */
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DHL_RAW_SHARE_MEMORY,
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DT_NETD_SHARE_MEMORY,
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DT_USB_SHARE_MEMORY,
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EE_AFTER_EPOF,
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AP_CCMNI_MTU, /* max Rx packet buffer size on AP side */
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MISC_INFO_CUSTOMER_VAL = 21,
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CCCI_FAST_HEADER = 22,
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MISC_INFO_C2K_MEID = 24,
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LWA_SHARE_MEMORY = 25,
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AUDIO_RAW_SHARE_MEMORY = 26,
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MULTI_MD_MPU = 27,
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CCISM_SHARE_MEMORY_EXP = 28,
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MD_PHY_CAPTURE = 29,
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MD_CONSYS_SHARE_MEMORY = 30,
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MD_USIP_SHARE_MEMORY = 31,
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MD_MTEE_SHARE_MEMORY_ENABLE = 32,
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MD_POS_SHARE_MEMORY = 33,
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UDC_RAW_SHARE_MEMORY = 34,
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MD_WIFI_PROXY_SHARE_MEMORY = 35,
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NVRAM_CACHE_SHARE_MEMORY = 36,
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SECURITY_SHARE_MEMORY = 37,
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MD_MEM_AP_VIEW_INF = 38,
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CCCI_MD_BIGDATA_SHARE_MEMORY = 46,
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CCCI_MD_IPCA_BIGDATA_SHARE_MEMORY = 47,
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AP_DEBUG_LEVEL = 48,
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MD_RUNTIME_FEATURE_ID_MAX,
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}; /* MD_CCCI_RUNTIME_FEATURE_ID; */
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enum AP_CCCI_RUNTIME_FEATURE_ID {
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AT_CHANNEL_NUM = 0,
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AP_RUNTIME_FEATURE_ID_MAX,
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};
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/* Rutime data common part */
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enum MISC_FEATURE_STATE {
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FEATURE_NOT_EXIST = 0,
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FEATURE_NOT_SUPPORT,
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FEATURE_SUPPORT,
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FEATURE_PARTIALLY_SUPPORT,
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};
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enum MISC_FEATURE_ID {
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MISC_DMA_ADDR = 0,
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MISC_32K_LESS,
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MISC_RAND_SEED,
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MISC_MD_COCLK_SETTING,
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MISC_MD_SBP_SETTING,
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MISC_MD_SEQ_CHECK,
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MISC_MD_CLIB_TIME,
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MISC_MD_C2K_ON,
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};
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struct ccci_feature_support {
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u8 support_mask:4;
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u8 version:4;
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};
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#define FEATURE_COUNT 64
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#define MD_FEATURE_QUERY_PATTERN 0x49434343
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#define AP_FEATURE_QUERY_PATTERN 0x43434349
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#define CCCI_AP_RUNTIME_RESERVED_SIZE 120
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#define CCCI_MD_RUNTIME_RESERVED_SIZE 152
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struct md_query_ap_feature {
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u32 head_pattern;
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struct ccci_feature_support feature_set[FEATURE_COUNT];
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u32 tail_pattern;
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#if (MD_GENERATION >= 6293)
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u8 reserved[CCCI_MD_RUNTIME_RESERVED_SIZE];
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#endif
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};
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struct ap_query_md_feature {
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u32 head_pattern;
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struct ccci_feature_support feature_set[FEATURE_COUNT];
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u32 share_memory_support;
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u32 ap_runtime_data_addr;
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u32 ap_runtime_data_size;
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u32 md_runtime_data_addr;
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u32 md_runtime_data_size;
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u32 set_md_mpu_start_addr;
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u32 set_md_mpu_total_size;
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u32 tail_pattern;
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#if (MD_GENERATION >= 6293)
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u8 reserved[CCCI_AP_RUNTIME_RESERVED_SIZE];
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#endif
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};
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struct ap_query_md_feature_v2_1 {
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u32 head_pattern;
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struct ccci_feature_support feature_set[FEATURE_COUNT];
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u32 share_memory_support;
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u32 ap_runtime_data_addr;
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u32 ap_runtime_data_size;
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u32 md_runtime_data_addr;
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u32 md_runtime_data_size;
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u32 noncached_mpu_start_addr;
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u32 noncached_mpu_total_size;
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u32 cached_mpu_start_addr;
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u32 cached_mpu_total_size;
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u32 reserve_addr[12];
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u32 tail_pattern;
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};
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enum HIF_EX_STAGE {
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HIF_EX_INIT = 0, /* interrupt */
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HIF_EX_ACK, /* AP->MD */
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HIF_EX_INIT_DONE, /* polling */
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HIF_EX_CLEARQ_DONE, /* interrupt */
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HIF_EX_CLEARQ_ACK, /* AP->MD */
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HIF_EX_ALLQ_RESET, /* polling */
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};
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enum {
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P_CORE = 0,
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VOLTE_CORE,
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};
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enum {
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EXTERNAL_MODEM = 0,
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INTERNAL_MODEM = 1,
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MULTI_MD_MPU_SUPPORT = 2,
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}; /* SHARE_MEMORY_SUPPORT */
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/* runtime data format uses EEMCS's version, NOT the same with legacy CCCI */
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struct modem_runtime {
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u32 Prefix; /* "CCIF" */
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u32 Platform_L; /* Hardware Platform String ex: "TK6516E0" */
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u32 Platform_H;
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u32 DriverVersion; /* 0x00000923 since W09.23 */
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u32 BootChannel; /* Channel to ACK AP with boot ready */
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/* MD is booting. NORMAL_BOOT_ID or META_BOOT_ID */
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u32 BootingStartID;
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/* not using in EEMCS */
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u32 BootAttributes; /* Attributes passing from AP to MD Booting */
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/* MD response ID if boot successful and ready */
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u32 BootReadyID;
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u32 FileShareMemBase;
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u32 FileShareMemSize;
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u32 ExceShareMemBase;
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u32 ExceShareMemSize;
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u32 CCIFShareMemBase;
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u32 CCIFShareMemSize;
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u32 DHLShareMemBase; /* For DHL */
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u32 DHLShareMemSize;
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u32 MD1MD3ShareMemBase; /* For MD1 MD3 share memory */
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u32 MD1MD3ShareMemSize;
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u32 TotalShareMemBase;
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u32 TotalShareMemSize;
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u32 CheckSum;
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u32 Postfix; /* "CCIF" */
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/* misc region */
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u32 misc_prefix; /* "MISC" */
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u32 support_mask;
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u32 index;
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u32 next;
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u32 feature_0_val[4];
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u32 feature_1_val[4];
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u32 feature_2_val[4];
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u32 feature_3_val[4];
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u32 feature_4_val[4];
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u32 feature_5_val[4];
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u32 feature_6_val[4];
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u32 feature_7_val[4];
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u32 feature_8_val[4];
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u32 feature_9_val[4];
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u32 feature_10_val[4];
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u32 feature_11_val[4];
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u32 feature_12_val[4];
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u32 feature_13_val[4];
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u32 feature_14_val[4];
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u32 feature_15_val[4];
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u32 reserved_2[3];
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u32 misc_postfix; /* "MISC" */
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} __packed;
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struct ccci_runtime_feature {
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u8 feature_id; /*for debug only*/
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struct ccci_feature_support support_info;
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u8 reserved[2];
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u32 data_len;
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u8 data[0];
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};
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struct ccci_runtime_boot_info {
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u32 boot_channel;
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u32 booting_start_id;
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u32 boot_attributes;
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u32 boot_ready_id;
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};
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struct ccci_runtime_share_memory {
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u32 addr;
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u32 size;
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|
|
};
|
||
|
|
|
||
|
|
struct ccci_misc_info_element {
|
||
|
|
u32 feature[4];
|
||
|
|
};
|
||
|
|
|
||
|
|
struct ccci_runtime_md_mem_ap_addr {
|
||
|
|
u32 md_view_phy;
|
||
|
|
u32 size;
|
||
|
|
u32 ap_view_phy_lo32;
|
||
|
|
u32 ap_view_phy_hi32;
|
||
|
|
};
|
||
|
|
|
||
|
|
enum {
|
||
|
|
MD_FLIGHT_MODE_NONE = 0,
|
||
|
|
MD_FLIGHT_MODE_ENTER = 1,
|
||
|
|
MD_FLIGHT_MODE_LEAVE = 2
|
||
|
|
};/* FLIGHT_STAGE */
|
||
|
|
|
||
|
|
extern unsigned int is_cdma2000_enable(int md_id);
|
||
|
|
extern int ccci_get_md_sec_smem_size_and_update(void);
|
||
|
|
|
||
|
|
struct ccci_mem_layout *ccci_md_get_mem(int md_id);
|
||
|
|
struct ccci_smem_region *ccci_md_get_smem_by_user_id(int md_id,
|
||
|
|
enum SMEM_USER_ID user_id);
|
||
|
|
void ccci_md_clear_smem(int md_id, int first_boot);
|
||
|
|
int ccci_md_start(unsigned char md_id);
|
||
|
|
int ccci_md_soft_start(unsigned char md_id, unsigned int sim_mode);
|
||
|
|
int ccci_md_send_runtime_data(unsigned char md_id);
|
||
|
|
int ccci_md_reset_pccif(unsigned char md_id);
|
||
|
|
void ccci_md_dump_info(unsigned char md_id, enum MODEM_DUMP_FLAG flag,
|
||
|
|
void *buff, int length);
|
||
|
|
int ccci_md_pre_stop(unsigned char md_id, unsigned int stop_type);
|
||
|
|
int ccci_md_stop(unsigned char md_id, unsigned int stop_type);
|
||
|
|
int ccci_md_soft_stop(unsigned char md_id, unsigned int sim_mode);
|
||
|
|
int ccci_md_force_assert(unsigned char md_id, enum MD_FORCE_ASSERT_TYPE type,
|
||
|
|
char *param, int len);
|
||
|
|
int ccci_md_prepare_runtime_data(unsigned char md_id, unsigned char *data,
|
||
|
|
int length);
|
||
|
|
void ccci_md_exception_handshake(unsigned char md_id, int timeout);
|
||
|
|
int ccci_md_send_ccb_tx_notify(unsigned char md_id, int core_id);
|
||
|
|
int ccci_md_set_boot_data(unsigned char md_id, unsigned int data[], int len);
|
||
|
|
int ccci_md_pre_start(unsigned char md_id);
|
||
|
|
int ccci_md_post_start(unsigned char md_id);
|
||
|
|
|
||
|
|
struct ccci_modem_cfg {
|
||
|
|
unsigned int load_type;
|
||
|
|
unsigned int load_type_saving;
|
||
|
|
unsigned int setting;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct ccci_sim_setting {
|
||
|
|
int sim_mode;
|
||
|
|
int slot1_mode; /* 0:CDMA 1:GSM 2:WCDMA 3:TDCDMA */
|
||
|
|
int slot2_mode; /* 0:CDMA 1:GSM 2:WCDMA 3:TDCDMA */
|
||
|
|
};
|
||
|
|
|
||
|
|
/*per modem data*/
|
||
|
|
struct ccci_per_md {
|
||
|
|
unsigned int md_capability;
|
||
|
|
unsigned int md_dbg_dump_flag;
|
||
|
|
enum MD_BOOT_MODE md_boot_mode;
|
||
|
|
char img_post_fix[IMG_POSTFIX_LEN];
|
||
|
|
struct ccci_image_info img_info[IMG_NUM];
|
||
|
|
unsigned int md_boot_data[16];
|
||
|
|
unsigned int sim_type;
|
||
|
|
struct ccci_modem_cfg config;
|
||
|
|
unsigned int md_img_exist[MAX_IMG_NUM];
|
||
|
|
unsigned int md_img_type_is_set;
|
||
|
|
struct ccci_sim_setting sim_setting;
|
||
|
|
int data_usb_bypass;
|
||
|
|
int dtr_state; /* only for usb bypass */
|
||
|
|
unsigned int is_in_ee_dump;
|
||
|
|
|
||
|
|
#ifdef CCCI_SKB_TRACE
|
||
|
|
unsigned long long netif_rx_profile[8];
|
||
|
|
#endif
|
||
|
|
};
|
||
|
|
struct ccci_per_md *ccci_get_per_md_data(unsigned char md_id);
|
||
|
|
|
||
|
|
static inline int ccci_md_get_cap_by_id(int md_id)
|
||
|
|
{
|
||
|
|
struct ccci_per_md *per_md_data = ccci_get_per_md_data(md_id);
|
||
|
|
|
||
|
|
if (per_md_data == NULL)
|
||
|
|
return -CCCI_ERR_MD_INDEX_NOT_FOUND;
|
||
|
|
return per_md_data->md_capability;
|
||
|
|
}
|
||
|
|
|
||
|
|
struct ccci_runtime_feature *ccci_md_get_rt_feature_by_id(unsigned char md_id,
|
||
|
|
u8 feature_id, u8 ap_query_md);
|
||
|
|
|
||
|
|
int ccci_md_parse_rt_feature(unsigned char md_id,
|
||
|
|
struct ccci_runtime_feature *rt_feature, void *data, u32 data_len);
|
||
|
|
extern int ccci_register_dev_node(const char *name, int major_id, int minor);
|
||
|
|
|
||
|
|
#endif
|