390 lines
9.9 KiB
C
390 lines
9.9 KiB
C
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/*
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* Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
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*
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* Original author:
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* Ben Collins <bcollins@ubuntu.com>
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*
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* Additional work by:
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* John Brooks <john.brooks@bluecherry.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOLO6X10_H
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#define __SOLO6X10_H
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#include <linux/pci.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/list.h>
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#include <linux/wait.h>
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#include <linux/stringify.h>
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#include <linux/io.h>
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#include <linux/atomic.h>
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#include <linux/slab.h>
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#include <linux/videodev2.h>
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#include <linux/gpio/driver.h>
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#include <media/v4l2-dev.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ctrls.h>
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#include <media/videobuf2-v4l2.h>
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#include "solo6x10-regs.h"
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#ifndef PCI_VENDOR_ID_SOFTLOGIC
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#define PCI_VENDOR_ID_SOFTLOGIC 0x9413
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#define PCI_DEVICE_ID_SOLO6010 0x6010
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#define PCI_DEVICE_ID_SOLO6110 0x6110
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#endif
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#ifndef PCI_VENDOR_ID_BLUECHERRY
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#define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
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/* Neugent Softlogic 6010 based cards */
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#define PCI_DEVICE_ID_NEUSOLO_4 0x4304
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#define PCI_DEVICE_ID_NEUSOLO_9 0x4309
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#define PCI_DEVICE_ID_NEUSOLO_16 0x4310
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/* Bluecherry Softlogic 6010 based cards */
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#define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
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#define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
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#define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
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/* Bluecherry Softlogic 6110 based cards */
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#define PCI_DEVICE_ID_BC_6110_4 0x5304
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#define PCI_DEVICE_ID_BC_6110_8 0x5308
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#define PCI_DEVICE_ID_BC_6110_16 0x5310
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#endif /* Bluecherry */
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/* Used in pci_device_id, and solo_dev->type */
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#define SOLO_DEV_6010 0
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#define SOLO_DEV_6110 1
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#define SOLO6X10_NAME "solo6x10"
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#define SOLO_MAX_CHANNELS 16
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#define SOLO6X10_VERSION "3.0.0"
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/*
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* The SOLO6x10 actually has 8 i2c channels, but we only use 2.
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* 0 - Techwell chip(s)
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* 1 - SAA7128
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*/
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#define SOLO_I2C_ADAPTERS 2
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#define SOLO_I2C_TW 0
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#define SOLO_I2C_SAA 1
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/* DMA Engine setup */
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#define SOLO_NR_P2M 4
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#define SOLO_NR_P2M_DESC 256
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#define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16)
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/* Encoder standard modes */
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#define SOLO_ENC_MODE_CIF 2
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#define SOLO_ENC_MODE_HD1 1
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#define SOLO_ENC_MODE_D1 9
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#define SOLO_DEFAULT_QP 3
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#define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
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#define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2)
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#define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3)
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/*
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* Motion thresholds are in a table of 64x64 samples, with
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* each sample representing 16x16 pixels of the source. In
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* effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
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* The 5th sample on the 10th row is (10*64)+5 = 645.
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*
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* Internally it is stored as a 45x45 array (45*16 = 720, which is the
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* maximum PAL/NTSC width).
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*/
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#define SOLO_MOTION_SZ (45)
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enum SOLO_I2C_STATE {
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IIC_STATE_IDLE,
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IIC_STATE_START,
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IIC_STATE_READ,
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IIC_STATE_WRITE,
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IIC_STATE_STOP
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};
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/* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
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struct solo_p2m_desc {
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u32 ctrl;
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u32 cfg;
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u32 dma_addr;
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u32 ext_addr;
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};
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struct solo_p2m_dev {
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struct mutex mutex;
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struct completion completion;
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int desc_count;
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int desc_idx;
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struct solo_p2m_desc *descs;
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int error;
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};
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#define OSD_TEXT_MAX 44
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struct solo_vb2_buf {
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struct vb2_v4l2_buffer vb;
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struct list_head list;
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};
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enum solo_enc_types {
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SOLO_ENC_TYPE_STD,
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SOLO_ENC_TYPE_EXT,
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};
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struct solo_enc_dev {
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struct solo_dev *solo_dev;
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/* V4L2 Items */
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struct v4l2_ctrl_handler hdl;
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struct v4l2_ctrl *md_thresholds;
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struct video_device *vfd;
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/* General accounting */
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struct mutex lock;
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spinlock_t motion_lock;
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u8 ch;
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u8 mode, gop, qp, interlaced, interval;
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u8 bw_weight;
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u16 motion_thresh;
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bool motion_global;
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bool motion_enabled;
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u16 width;
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u16 height;
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/* OSD buffers */
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char osd_text[OSD_TEXT_MAX + 1];
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u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
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__aligned(4);
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/* VOP stuff */
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u8 vop[64];
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int vop_len;
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u8 jpeg_header[1024];
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int jpeg_len;
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u32 fmt;
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enum solo_enc_types type;
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u32 sequence;
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struct vb2_queue vidq;
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struct list_head vidq_active;
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int desc_count;
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int desc_nelts;
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struct solo_p2m_desc *desc_items;
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dma_addr_t desc_dma;
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spinlock_t av_lock;
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};
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/* The SOLO6x10 PCI Device */
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struct solo_dev {
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/* General stuff */
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struct pci_dev *pdev;
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int type;
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unsigned int time_sync;
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unsigned int usec_lsb;
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unsigned int clock_mhz;
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u8 __iomem *reg_base;
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int nr_chans;
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int nr_ext;
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u32 irq_mask;
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u32 motion_mask;
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struct v4l2_device v4l2_dev;
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#ifdef CONFIG_GPIOLIB
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/* GPIO */
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struct gpio_chip gpio_dev;
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#endif
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/* tw28xx accounting */
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u8 tw2865, tw2864, tw2815;
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u8 tw28_cnt;
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/* i2c related items */
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struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
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enum SOLO_I2C_STATE i2c_state;
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struct mutex i2c_mutex;
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int i2c_id;
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wait_queue_head_t i2c_wait;
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struct i2c_msg *i2c_msg;
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unsigned int i2c_msg_num;
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unsigned int i2c_msg_ptr;
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/* P2M DMA Engine */
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struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
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atomic_t p2m_count;
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int p2m_jiffies;
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unsigned int p2m_timeouts;
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/* V4L2 Display items */
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struct video_device *vfd;
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unsigned int erasing;
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unsigned int frame_blank;
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u8 cur_disp_ch;
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wait_queue_head_t disp_thread_wait;
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struct v4l2_ctrl_handler disp_hdl;
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/* V4L2 Encoder items */
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struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
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u16 enc_bw_remain;
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/* IDX into hw mp4 encoder */
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u8 enc_idx;
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/* Current video settings */
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u32 video_type;
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u16 video_hsize, video_vsize;
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u16 vout_hstart, vout_vstart;
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u16 vin_hstart, vin_vstart;
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u8 fps;
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/* JPEG Qp setting */
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spinlock_t jpeg_qp_lock;
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u32 jpeg_qp[2];
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/* Audio components */
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struct snd_card *snd_card;
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struct snd_pcm *snd_pcm;
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atomic_t snd_users;
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int g723_hw_idx;
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/* sysfs stuffs */
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struct device dev;
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int sdram_size;
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struct bin_attribute sdram_attr;
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unsigned int sys_config;
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/* Ring thread */
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struct task_struct *ring_thread;
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wait_queue_head_t ring_thread_wait;
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/* VOP_HEADER handling */
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void *vh_buf;
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dma_addr_t vh_dma;
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int vh_size;
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/* Buffer handling */
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struct vb2_queue vidq;
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u32 sequence;
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struct task_struct *kthread;
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struct mutex lock;
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spinlock_t slock;
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int old_write;
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struct list_head vidq_active;
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};
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static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
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{
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return readl(solo_dev->reg_base + reg);
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}
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static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
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u32 data)
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{
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u16 val;
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writel(data, solo_dev->reg_base + reg);
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pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
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}
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static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
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{
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dev->irq_mask |= mask;
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solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
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}
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static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
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{
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dev->irq_mask &= ~mask;
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solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
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}
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/* Init/exit routines for subsystems */
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int solo_disp_init(struct solo_dev *solo_dev);
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void solo_disp_exit(struct solo_dev *solo_dev);
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int solo_gpio_init(struct solo_dev *solo_dev);
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void solo_gpio_exit(struct solo_dev *solo_dev);
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int solo_i2c_init(struct solo_dev *solo_dev);
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void solo_i2c_exit(struct solo_dev *solo_dev);
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int solo_p2m_init(struct solo_dev *solo_dev);
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void solo_p2m_exit(struct solo_dev *solo_dev);
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int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
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void solo_v4l2_exit(struct solo_dev *solo_dev);
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int solo_enc_init(struct solo_dev *solo_dev);
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void solo_enc_exit(struct solo_dev *solo_dev);
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int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
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void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
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int solo_g723_init(struct solo_dev *solo_dev);
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void solo_g723_exit(struct solo_dev *solo_dev);
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/* ISR's */
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int solo_i2c_isr(struct solo_dev *solo_dev);
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void solo_p2m_isr(struct solo_dev *solo_dev, int id);
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void solo_p2m_error_isr(struct solo_dev *solo_dev);
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void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
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void solo_g723_isr(struct solo_dev *solo_dev);
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void solo_motion_isr(struct solo_dev *solo_dev);
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void solo_video_in_isr(struct solo_dev *solo_dev);
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/* i2c read/write */
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u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
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void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
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u8 data);
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/* P2M DMA */
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int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
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dma_addr_t dma_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size);
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int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
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void *sys_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size);
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void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
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dma_addr_t dma_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size);
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int solo_p2m_dma_desc(struct solo_dev *solo_dev,
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|
struct solo_p2m_desc *desc, dma_addr_t desc_dma,
|
||
|
|
int desc_cnt);
|
||
|
|
|
||
|
|
/* Global s_std ioctl */
|
||
|
|
int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz);
|
||
|
|
void solo_update_mode(struct solo_enc_dev *solo_enc);
|
||
|
|
|
||
|
|
/* Set the threshold for motion detection */
|
||
|
|
int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
|
||
|
|
int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
|
||
|
|
const u16 *thresholds);
|
||
|
|
#define SOLO_DEF_MOT_THRESH 0x0300
|
||
|
|
|
||
|
|
/* Write text on OSD */
|
||
|
|
int solo_osd_print(struct solo_enc_dev *solo_enc);
|
||
|
|
|
||
|
|
/* EEPROM commands */
|
||
|
|
unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
|
||
|
|
__be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
|
||
|
|
int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
|
||
|
|
__be16 data);
|
||
|
|
|
||
|
|
/* JPEG Qp functions */
|
||
|
|
void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
|
||
|
|
unsigned int qp);
|
||
|
|
int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
|
||
|
|
|
||
|
|
#define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
|
||
|
|
|
||
|
|
#endif /* __SOLO6X10_H */
|