43 lines
1.4 KiB
Plaintext
43 lines
1.4 KiB
Plaintext
|
* Samsung Exynos5420 Clock Controller
|
||
|
|
|
||
|
|
The Exynos5420 clock controller generates and supplies clock to various
|
||
|
|
controllers within the Exynos5420 SoC and for the Exynos5800 SoC.
|
||
|
|
|
||
|
|
Required Properties:
|
||
|
|
|
||
|
|
- compatible: should be one of the following.
|
||
|
|
- "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC.
|
||
|
|
- "samsung,exynos5800-clock" - controller compatible with Exynos5800 SoC.
|
||
|
|
|
||
|
|
- reg: physical base address of the controller and length of memory mapped
|
||
|
|
region.
|
||
|
|
|
||
|
|
- #clock-cells: should be 1.
|
||
|
|
|
||
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
||
|
|
to specify the clock which they consume.
|
||
|
|
|
||
|
|
All available clocks are defined as preprocessor macros in
|
||
|
|
dt-bindings/clock/exynos5420.h header and can be used in device
|
||
|
|
tree sources.
|
||
|
|
|
||
|
|
Example 1: An example of a clock controller node is listed below.
|
||
|
|
|
||
|
|
clock: clock-controller@10010000 {
|
||
|
|
compatible = "samsung,exynos5420-clock";
|
||
|
|
reg = <0x10010000 0x30000>;
|
||
|
|
#clock-cells = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
Example 2: UART controller node that consumes the clock generated by the clock
|
||
|
|
controller. Refer to the standard clock bindings for information
|
||
|
|
about 'clocks' and 'clock-names' property.
|
||
|
|
|
||
|
|
serial@13820000 {
|
||
|
|
compatible = "samsung,exynos4210-uart";
|
||
|
|
reg = <0x13820000 0x100>;
|
||
|
|
interrupts = <0 54 0>;
|
||
|
|
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
|
||
|
|
clock-names = "uart", "clk_uart_baud0";
|
||
|
|
};
|