95 lines
2.8 KiB
Plaintext
95 lines
2.8 KiB
Plaintext
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Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
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The ATL IP is used to generate clock to be used to synchronize baseband and
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audio codec. A single ATL IP provides four ATL clock instances sharing the same
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functional clock but can be configured to provide different clocks.
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ATL can maintain a clock averages to some desired frequency based on the bws/aws
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signals - can compensate the drift between the two ws signal.
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In order to provide the support for ATL and it's output clocks (which can be used
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internally within the SoC or external components) two sets of bindings is needed:
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Clock tree binding:
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This binding uses the common clock binding[1].
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To be able to integrate the ATL clocks with DT clock tree.
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Provides ccf level representation of the ATL clocks to be used by drivers.
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Since the clock instances are part of a single IP this binding is used as a node
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for the DT clock tree, the IP driver is needed to handle the actual configuration
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of the IP.
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be "ti,dra7-atl-clock"
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : link phandles to functional clock of ATL
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Binding for the IP driver:
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This binding is used to configure the IP driver which is going to handle the
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configuration of the IP for the ATL clock instances.
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Required properties:
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- compatible : shall be "ti,dra7-atl"
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- reg : base address for the ATL IP
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- ti,provided-clocks : List of phandles to the clocks associated with the ATL
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- clocks : link phandles to functional clock of ATL
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- clock-names : Shall be set to "fck"
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- ti,hwmods : Shall be set to "atl"
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Optional properties:
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Configuration of ATL instances:
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- atl{0/1/2/3} {
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- bws : Baseband word select signal selection
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- aws : Audio word select signal selection
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};
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For valid word select signals, see the dt-bindings/clk/ti-dra7-atl.h include
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file.
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Examples:
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/* clock bindings for atl provided clocks */
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atl_clkin0_ck: atl_clkin0_ck {
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#clock-cells = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin1_ck: atl_clkin1_ck {
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#clock-cells = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin2_ck: atl_clkin2_ck {
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#clock-cells = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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atl_clkin3_ck: atl_clkin3_ck {
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#clock-cells = <0>;
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compatible = "ti,dra7-atl-clock";
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clocks = <&atl_gfclk_mux>;
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};
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/* binding for the IP */
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atl: atl@4843c000 {
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compatible = "ti,dra7-atl";
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reg = <0x4843c000 0x3ff>;
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ti,hwmods = "atl";
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ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
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<&atl_clkin2_ck>, <&atl_clkin3_ck>;
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clocks = <&atl_gfclk_mux>;
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clock-names = "fck";
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};
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#include <dt-bindings/clk/ti-dra7-atl.h>
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&atl {
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atl2 {
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bws = <DRA7_ATL_WS_MCASP2_FSX>;
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aws = <DRA7_ATL_WS_MCASP3_FSX>;
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};
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};
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