67 lines
2.1 KiB
Plaintext
67 lines
2.1 KiB
Plaintext
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Device-Tree bindings for tilcdc DRM generic panel output driver
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Required properties:
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- compatible: value should be "ti,tilcdc,panel".
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- panel-info: configuration info to configure LCDC correctly for the panel
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- ac-bias: AC Bias Pin Frequency
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- ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
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- dma-burst-sz: DMA burst size
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- bpp: Bits per pixel
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- fdd: FIFO DMA Request Delay
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- sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
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- sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
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- raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most
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- fifo-th: DMA FIFO threshold
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- display-timings: typical videomode of lcd panel. Multiple video modes
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can be listed if the panel supports multiple timings, but the 'native-mode'
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should be the preferred/default resolution. Refer to
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Documentation/devicetree/bindings/display/panel/display-timing.txt for display
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timing binding details.
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Optional properties:
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- backlight: phandle of the backlight device attached to the panel
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- enable-gpios: GPIO pin to enable or disable the panel
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Recommended properties:
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- pinctrl-names, pinctrl-0: the pincontrol settings to configure
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muxing properly for pins that connect to TFP410 device
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Example:
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/* Settings for CDTech_S035Q01 / LCD3 cape: */
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lcd3 {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default";
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pinctrl-0 = <&bone_lcd3_cape_lcd_pins>;
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backlight = <&backlight>;
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enable-gpios = <&gpio3 19 0>;
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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fdd = <0x80>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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};
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display-timings {
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native-mode = <&timing0>;
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timing0: 320x240 {
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hactive = <320>;
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vactive = <240>;
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hback-porch = <21>;
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hfront-porch = <58>;
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hsync-len = <47>;
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vback-porch = <11>;
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vfront-porch = <23>;
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vsync-len = <2>;
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clock-frequency = <8000000>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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};
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