46 lines
1.6 KiB
Plaintext
46 lines
1.6 KiB
Plaintext
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STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)
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Required properties:
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- compatible: "st,stm32-dcmi"
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- reg: physical base address and length of the registers set for the device
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- interrupts: should contain IRQ line for the DCMI
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- resets: reference to a reset controller,
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see Documentation/devicetree/bindings/reset/st,stm32-rcc.txt
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- clocks: list of clock specifiers, corresponding to entries in
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the clock-names property
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- clock-names: must contain "mclk", which is the DCMI peripherial clock
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- pinctrl: the pincontrol settings to configure muxing properly
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for pins that connect to DCMI device.
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See Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt.
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- dmas: phandle to DMA controller node,
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see Documentation/devicetree/bindings/dma/stm32-dma.txt
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- dma-names: must contain "tx", which is the transmit channel from DCMI to DMA
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DCMI supports a single port node with parallel bus. It should contain one
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'port' child node with child 'endpoint' node. Please refer to the bindings
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defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
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Example:
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dcmi: dcmi@50050000 {
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compatible = "st,stm32-dcmi";
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reg = <0x50050000 0x400>;
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interrupts = <78>;
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resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;
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clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
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clock-names = "mclk";
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pinctrl-names = "default";
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pinctrl-0 = <&dcmi_pins>;
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dmas = <&dma2 1 1 0x414 0x3>;
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dma-names = "tx";
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port {
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dcmi_0: endpoint {
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remote-endpoint = <...>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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pclk-sample = <1>;
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};
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};
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};
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