649 lines
17 KiB
C
649 lines
17 KiB
C
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/*
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* Marvell 88E6xxx Switch hardware timestamping support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 National Instruments
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* Erik Hons <erik.hons@ni.com>
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* Brandon Streiff <brandon.streiff@ni.com>
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* Dane Wagner <dane.wagner@ni.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "chip.h"
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#include "global2.h"
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#include "hwtstamp.h"
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#include "ptp.h"
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#include <linux/ptp_classify.h>
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#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))
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static int mv88e6xxx_port_ptp_read(struct mv88e6xxx_chip *chip, int port,
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int addr, u16 *data, int len)
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{
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if (!chip->info->ops->avb_ops->port_ptp_read)
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return -EOPNOTSUPP;
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return chip->info->ops->avb_ops->port_ptp_read(chip, port, addr,
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data, len);
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}
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static int mv88e6xxx_port_ptp_write(struct mv88e6xxx_chip *chip, int port,
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int addr, u16 data)
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{
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if (!chip->info->ops->avb_ops->port_ptp_write)
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return -EOPNOTSUPP;
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return chip->info->ops->avb_ops->port_ptp_write(chip, port, addr,
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data);
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}
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static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip *chip, int addr,
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u16 data)
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{
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if (!chip->info->ops->avb_ops->ptp_write)
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return -EOPNOTSUPP;
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return chip->info->ops->avb_ops->ptp_write(chip, addr, data);
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}
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static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip *chip, int addr,
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u16 *data)
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{
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if (!chip->info->ops->avb_ops->ptp_read)
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return -EOPNOTSUPP;
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return chip->info->ops->avb_ops->ptp_read(chip, addr, data, 1);
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}
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/* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX
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* timestamp. When working properly, hardware will produce a timestamp
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* within 1ms. Software may enounter delays due to MDIO contention, so
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* the timeout is set accordingly.
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*/
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#define TX_TSTAMP_TIMEOUT msecs_to_jiffies(40)
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int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
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struct ethtool_ts_info *info)
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{
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const struct mv88e6xxx_ptp_ops *ptp_ops;
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struct mv88e6xxx_chip *chip;
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chip = ds->priv;
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ptp_ops = chip->info->ops->ptp_ops;
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if (!chip->info->ptp_support)
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return -EOPNOTSUPP;
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info->so_timestamping =
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SOF_TIMESTAMPING_TX_HARDWARE |
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SOF_TIMESTAMPING_RX_HARDWARE |
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SOF_TIMESTAMPING_RAW_HARDWARE;
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info->phc_index = ptp_clock_index(chip->ptp_clock);
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info->tx_types =
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(1 << HWTSTAMP_TX_OFF) |
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(1 << HWTSTAMP_TX_ON);
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info->rx_filters = ptp_ops->rx_filters;
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return 0;
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}
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static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,
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struct hwtstamp_config *config)
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{
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const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
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struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
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bool tstamp_enable = false;
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/* Prevent the TX/RX paths from trying to interact with the
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* timestamp hardware while we reconfigure it.
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*/
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clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state);
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/* reserved for future extensions */
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if (config->flags)
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return -EINVAL;
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switch (config->tx_type) {
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case HWTSTAMP_TX_OFF:
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tstamp_enable = false;
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break;
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case HWTSTAMP_TX_ON:
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tstamp_enable = true;
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break;
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default:
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return -ERANGE;
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}
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/* The switch supports timestamping both L2 and L4; one cannot be
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* disabled independently of the other.
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*/
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if (!(BIT(config->rx_filter) & ptp_ops->rx_filters)) {
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config->rx_filter = HWTSTAMP_FILTER_NONE;
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dev_dbg(chip->dev, "Unsupported rx_filter %d\n",
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config->rx_filter);
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return -ERANGE;
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}
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switch (config->rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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tstamp_enable = false;
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break;
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case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
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case HWTSTAMP_FILTER_PTP_V2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
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config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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break;
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case HWTSTAMP_FILTER_ALL:
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default:
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config->rx_filter = HWTSTAMP_FILTER_NONE;
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return -ERANGE;
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}
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mutex_lock(&chip->reg_lock);
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if (tstamp_enable) {
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chip->enable_count += 1;
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if (chip->enable_count == 1 && ptp_ops->global_enable)
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ptp_ops->global_enable(chip);
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if (ptp_ops->port_enable)
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ptp_ops->port_enable(chip, port);
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} else {
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if (ptp_ops->port_disable)
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ptp_ops->port_disable(chip, port);
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chip->enable_count -= 1;
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if (chip->enable_count == 0 && ptp_ops->global_disable)
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ptp_ops->global_disable(chip);
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}
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mutex_unlock(&chip->reg_lock);
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/* Once hardware has been configured, enable timestamp checks
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* in the RX/TX paths.
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*/
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if (tstamp_enable)
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set_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state);
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return 0;
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}
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int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,
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struct ifreq *ifr)
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{
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struct mv88e6xxx_chip *chip = ds->priv;
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struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
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struct hwtstamp_config config;
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int err;
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if (!chip->info->ptp_support)
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return -EOPNOTSUPP;
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if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
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return -EFAULT;
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err = mv88e6xxx_set_hwtstamp_config(chip, port, &config);
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if (err)
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return err;
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/* Save the chosen configuration to be returned later. */
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memcpy(&ps->tstamp_config, &config, sizeof(config));
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return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
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-EFAULT : 0;
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}
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int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,
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struct ifreq *ifr)
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{
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struct mv88e6xxx_chip *chip = ds->priv;
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struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
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struct hwtstamp_config *config = &ps->tstamp_config;
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if (!chip->info->ptp_support)
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return -EOPNOTSUPP;
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return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
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-EFAULT : 0;
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}
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/* Get the start of the PTP header in this skb */
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static u8 *parse_ptp_header(struct sk_buff *skb, unsigned int type)
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{
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u8 *data = skb_mac_header(skb);
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unsigned int offset = 0;
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if (type & PTP_CLASS_VLAN)
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offset += VLAN_HLEN;
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switch (type & PTP_CLASS_PMASK) {
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case PTP_CLASS_IPV4:
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offset += ETH_HLEN + IPV4_HLEN(data + offset) + UDP_HLEN;
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break;
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case PTP_CLASS_IPV6:
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offset += ETH_HLEN + IP6_HLEN + UDP_HLEN;
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break;
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case PTP_CLASS_L2:
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offset += ETH_HLEN;
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break;
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default:
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return NULL;
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}
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/* Ensure that the entire header is present in this packet. */
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if (skb->len + ETH_HLEN < offset + 34)
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return NULL;
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return data + offset;
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}
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/* Returns a pointer to the PTP header if the caller should time stamp,
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* or NULL if the caller should not.
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*/
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static u8 *mv88e6xxx_should_tstamp(struct mv88e6xxx_chip *chip, int port,
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struct sk_buff *skb, unsigned int type)
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{
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struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
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u8 *hdr;
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if (!chip->info->ptp_support)
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return NULL;
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hdr = parse_ptp_header(skb, type);
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if (!hdr)
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return NULL;
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if (!test_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state))
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return NULL;
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return hdr;
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}
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static int mv88e6xxx_ts_valid(u16 status)
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{
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if (!(status & MV88E6XXX_PTP_TS_VALID))
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return 0;
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if (status & MV88E6XXX_PTP_TS_STATUS_MASK)
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return 0;
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return 1;
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}
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static int seq_match(struct sk_buff *skb, u16 ts_seqid)
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{
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unsigned int type = SKB_PTP_TYPE(skb);
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u8 *hdr = parse_ptp_header(skb, type);
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__be16 *seqid;
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seqid = (__be16 *)(hdr + OFF_PTP_SEQUENCE_ID);
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return ts_seqid == ntohs(*seqid);
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}
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static void mv88e6xxx_get_rxts(struct mv88e6xxx_chip *chip,
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struct mv88e6xxx_port_hwtstamp *ps,
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struct sk_buff *skb, u16 reg,
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struct sk_buff_head *rxq)
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{
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u16 buf[4] = { 0 }, status, seq_id;
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struct skb_shared_hwtstamps *shwt;
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struct sk_buff_head received;
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u64 ns, timelo, timehi;
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unsigned long flags;
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int err;
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/* The latched timestamp belongs to one of the received frames. */
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__skb_queue_head_init(&received);
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spin_lock_irqsave(&rxq->lock, flags);
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skb_queue_splice_tail_init(rxq, &received);
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spin_unlock_irqrestore(&rxq->lock, flags);
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mutex_lock(&chip->reg_lock);
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err = mv88e6xxx_port_ptp_read(chip, ps->port_id,
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reg, buf, ARRAY_SIZE(buf));
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mutex_unlock(&chip->reg_lock);
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if (err)
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pr_err("failed to get the receive time stamp\n");
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status = buf[0];
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timelo = buf[1];
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timehi = buf[2];
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seq_id = buf[3];
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if (status & MV88E6XXX_PTP_TS_VALID) {
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mutex_lock(&chip->reg_lock);
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err = mv88e6xxx_port_ptp_write(chip, ps->port_id, reg, 0);
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mutex_unlock(&chip->reg_lock);
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if (err)
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pr_err("failed to clear the receive status\n");
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}
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/* Since the device can only handle one time stamp at a time,
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* we purge any extra frames from the queue.
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*/
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for ( ; skb; skb = __skb_dequeue(&received)) {
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if (mv88e6xxx_ts_valid(status) && seq_match(skb, seq_id)) {
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ns = timehi << 16 | timelo;
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mutex_lock(&chip->reg_lock);
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ns = timecounter_cyc2time(&chip->tstamp_tc, ns);
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mutex_unlock(&chip->reg_lock);
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shwt = skb_hwtstamps(skb);
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memset(shwt, 0, sizeof(*shwt));
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shwt->hwtstamp = ns_to_ktime(ns);
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status &= ~MV88E6XXX_PTP_TS_VALID;
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}
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netif_rx_ni(skb);
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}
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}
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static void mv88e6xxx_rxtstamp_work(struct mv88e6xxx_chip *chip,
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struct mv88e6xxx_port_hwtstamp *ps)
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{
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const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
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struct sk_buff *skb;
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skb = skb_dequeue(&ps->rx_queue);
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if (skb)
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mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr0_sts_reg,
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&ps->rx_queue);
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skb = skb_dequeue(&ps->rx_queue2);
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if (skb)
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mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr1_sts_reg,
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&ps->rx_queue2);
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}
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static int is_pdelay_resp(u8 *msgtype)
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{
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return (*msgtype & 0xf) == 3;
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}
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bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
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struct sk_buff *skb, unsigned int type)
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{
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struct mv88e6xxx_port_hwtstamp *ps;
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struct mv88e6xxx_chip *chip;
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u8 *hdr;
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chip = ds->priv;
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ps = &chip->port_hwtstamp[port];
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if (ps->tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT)
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return false;
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hdr = mv88e6xxx_should_tstamp(chip, port, skb, type);
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if (!hdr)
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return false;
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SKB_PTP_TYPE(skb) = type;
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if (is_pdelay_resp(hdr))
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skb_queue_tail(&ps->rx_queue2, skb);
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else
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skb_queue_tail(&ps->rx_queue, skb);
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ptp_schedule_worker(chip->ptp_clock, 0);
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return true;
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}
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static int mv88e6xxx_txtstamp_work(struct mv88e6xxx_chip *chip,
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struct mv88e6xxx_port_hwtstamp *ps)
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{
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const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
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struct skb_shared_hwtstamps shhwtstamps;
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u16 departure_block[4], status;
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struct sk_buff *tmp_skb;
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u32 time_raw;
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int err;
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u64 ns;
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if (!ps->tx_skb)
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return 0;
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mutex_lock(&chip->reg_lock);
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||
|
err = mv88e6xxx_port_ptp_read(chip, ps->port_id,
|
||
|
ptp_ops->dep_sts_reg,
|
||
|
departure_block,
|
||
|
ARRAY_SIZE(departure_block));
|
||
|
mutex_unlock(&chip->reg_lock);
|
||
|
|
||
|
if (err)
|
||
|
goto free_and_clear_skb;
|
||
|
|
||
|
if (!(departure_block[0] & MV88E6XXX_PTP_TS_VALID)) {
|
||
|
if (time_is_before_jiffies(ps->tx_tstamp_start +
|
||
|
TX_TSTAMP_TIMEOUT)) {
|
||
|
dev_warn(chip->dev, "p%d: clearing tx timestamp hang\n",
|
||
|
ps->port_id);
|
||
|
goto free_and_clear_skb;
|
||
|
}
|
||
|
/* The timestamp should be available quickly, while getting it
|
||
|
* is high priority and time bounded to only 10ms. A poll is
|
||
|
* warranted so restart the work.
|
||
|
*/
|
||
|
return 1;
|
||
|
}
|
||
|
|
||
|
/* We have the timestamp; go ahead and clear valid now */
|
||
|
mutex_lock(&chip->reg_lock);
|
||
|
mv88e6xxx_port_ptp_write(chip, ps->port_id, ptp_ops->dep_sts_reg, 0);
|
||
|
mutex_unlock(&chip->reg_lock);
|
||
|
|
||
|
status = departure_block[0] & MV88E6XXX_PTP_TS_STATUS_MASK;
|
||
|
if (status != MV88E6XXX_PTP_TS_STATUS_NORMAL) {
|
||
|
dev_warn(chip->dev, "p%d: tx timestamp overrun\n", ps->port_id);
|
||
|
goto free_and_clear_skb;
|
||
|
}
|
||
|
|
||
|
if (departure_block[3] != ps->tx_seq_id) {
|
||
|
dev_warn(chip->dev, "p%d: unexpected seq. id\n", ps->port_id);
|
||
|
goto free_and_clear_skb;
|
||
|
}
|
||
|
|
||
|
memset(&shhwtstamps, 0, sizeof(shhwtstamps));
|
||
|
time_raw = ((u32)departure_block[2] << 16) | departure_block[1];
|
||
|
mutex_lock(&chip->reg_lock);
|
||
|
ns = timecounter_cyc2time(&chip->tstamp_tc, time_raw);
|
||
|
mutex_unlock(&chip->reg_lock);
|
||
|
shhwtstamps.hwtstamp = ns_to_ktime(ns);
|
||
|
|
||
|
dev_dbg(chip->dev,
|
||
|
"p%d: txtstamp %llx status 0x%04x skb ID 0x%04x hw ID 0x%04x\n",
|
||
|
ps->port_id, ktime_to_ns(shhwtstamps.hwtstamp),
|
||
|
departure_block[0], ps->tx_seq_id, departure_block[3]);
|
||
|
|
||
|
/* skb_complete_tx_timestamp() will free up the client to make
|
||
|
* another timestamp-able transmit. We have to be ready for it
|
||
|
* -- by clearing the ps->tx_skb "flag" -- beforehand.
|
||
|
*/
|
||
|
|
||
|
tmp_skb = ps->tx_skb;
|
||
|
ps->tx_skb = NULL;
|
||
|
clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
|
||
|
skb_complete_tx_timestamp(tmp_skb, &shhwtstamps);
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
free_and_clear_skb:
|
||
|
dev_kfree_skb_any(ps->tx_skb);
|
||
|
ps->tx_skb = NULL;
|
||
|
clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp)
|
||
|
{
|
||
|
struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
|
||
|
struct dsa_switch *ds = chip->ds;
|
||
|
struct mv88e6xxx_port_hwtstamp *ps;
|
||
|
int i, restart = 0;
|
||
|
|
||
|
for (i = 0; i < ds->num_ports; i++) {
|
||
|
if (!dsa_is_user_port(ds, i))
|
||
|
continue;
|
||
|
|
||
|
ps = &chip->port_hwtstamp[i];
|
||
|
if (test_bit(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state))
|
||
|
restart |= mv88e6xxx_txtstamp_work(chip, ps);
|
||
|
|
||
|
mv88e6xxx_rxtstamp_work(chip, ps);
|
||
|
}
|
||
|
|
||
|
return restart ? 1 : -1;
|
||
|
}
|
||
|
|
||
|
bool mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
|
||
|
struct sk_buff *clone, unsigned int type)
|
||
|
{
|
||
|
struct mv88e6xxx_chip *chip = ds->priv;
|
||
|
struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
|
||
|
__be16 *seq_ptr;
|
||
|
u8 *hdr;
|
||
|
|
||
|
if (!(skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP))
|
||
|
return false;
|
||
|
|
||
|
hdr = mv88e6xxx_should_tstamp(chip, port, clone, type);
|
||
|
if (!hdr)
|
||
|
return false;
|
||
|
|
||
|
seq_ptr = (__be16 *)(hdr + OFF_PTP_SEQUENCE_ID);
|
||
|
|
||
|
if (test_and_set_bit_lock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,
|
||
|
&ps->state))
|
||
|
return false;
|
||
|
|
||
|
ps->tx_skb = clone;
|
||
|
ps->tx_tstamp_start = jiffies;
|
||
|
ps->tx_seq_id = be16_to_cpup(seq_ptr);
|
||
|
|
||
|
ptp_schedule_worker(chip->ptp_clock, 0);
|
||
|
return true;
|
||
|
}
|
||
|
|
||
|
int mv88e6165_global_disable(struct mv88e6xxx_chip *chip)
|
||
|
{
|
||
|
u16 val;
|
||
|
int err;
|
||
|
|
||
|
err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val);
|
||
|
if (err)
|
||
|
return err;
|
||
|
val |= MV88E6165_PTP_CFG_DISABLE_PTP;
|
||
|
|
||
|
return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);
|
||
|
}
|
||
|
|
||
|
int mv88e6165_global_enable(struct mv88e6xxx_chip *chip)
|
||
|
{
|
||
|
u16 val;
|
||
|
int err;
|
||
|
|
||
|
err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val);
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
val &= ~(MV88E6165_PTP_CFG_DISABLE_PTP | MV88E6165_PTP_CFG_TSPEC_MASK);
|
||
|
|
||
|
return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);
|
||
|
}
|
||
|
|
||
|
int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port)
|
||
|
{
|
||
|
return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,
|
||
|
MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP);
|
||
|
}
|
||
|
|
||
|
int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port)
|
||
|
{
|
||
|
return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,
|
||
|
MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH);
|
||
|
}
|
||
|
|
||
|
static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip *chip, int port)
|
||
|
{
|
||
|
const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
|
||
|
struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
|
||
|
|
||
|
ps->port_id = port;
|
||
|
|
||
|
skb_queue_head_init(&ps->rx_queue);
|
||
|
skb_queue_head_init(&ps->rx_queue2);
|
||
|
|
||
|
if (ptp_ops->port_disable)
|
||
|
return ptp_ops->port_disable(chip, port);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)
|
||
|
{
|
||
|
const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
|
||
|
int err;
|
||
|
int i;
|
||
|
|
||
|
/* Disable timestamping on all ports. */
|
||
|
for (i = 0; i < mv88e6xxx_num_ports(chip); ++i) {
|
||
|
err = mv88e6xxx_hwtstamp_port_setup(chip, i);
|
||
|
if (err)
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
/* Disable PTP globally */
|
||
|
if (ptp_ops->global_disable) {
|
||
|
err = ptp_ops->global_disable(chip);
|
||
|
if (err)
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
/* Set the ethertype of L2 PTP messages */
|
||
|
err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_GC_ETYPE, ETH_P_1588);
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
/* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to
|
||
|
* timestamp. This affects all ports that have timestamping enabled,
|
||
|
* but the timestamp config is per-port; thus we configure all events
|
||
|
* here and only support the HWTSTAMP_FILTER_*_EVENT filter types.
|
||
|
*/
|
||
|
err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_MSGTYPE,
|
||
|
MV88E6XXX_PTP_MSGTYPE_ALL_EVENT);
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
/* Use ARRIVAL1 for peer delay response messages. */
|
||
|
err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_TS_ARRIVAL_PTR,
|
||
|
MV88E6XXX_PTP_MSGTYPE_PDLAY_RES);
|
||
|
if (err)
|
||
|
return err;
|
||
|
|
||
|
/* 88E6341 devices default to timestamping at the PHY, but this has
|
||
|
* a hardware issue that results in unreliable timestamps. Force
|
||
|
* these devices to timestamp at the MAC.
|
||
|
*/
|
||
|
if (chip->info->family == MV88E6XXX_FAMILY_6341) {
|
||
|
u16 val = MV88E6341_PTP_CFG_UPDATE |
|
||
|
MV88E6341_PTP_CFG_MODE_IDX |
|
||
|
MV88E6341_PTP_CFG_MODE_TS_AT_MAC;
|
||
|
err = mv88e6xxx_ptp_write(chip, MV88E6341_PTP_CFG, val);
|
||
|
if (err)
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)
|
||
|
{
|
||
|
}
|