559 lines
14 KiB
C
559 lines
14 KiB
C
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/* QLogic qede NIC Driver
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* Copyright (c) 2015-2017 QLogic Corporation
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and /or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "qede_ptp.h"
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struct qede_ptp {
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const struct qed_eth_ptp_ops *ops;
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struct ptp_clock_info clock_info;
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struct cyclecounter cc;
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struct timecounter tc;
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struct ptp_clock *clock;
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struct work_struct work;
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struct qede_dev *edev;
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struct sk_buff *tx_skb;
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/* ptp spinlock is used for protecting the cycle/time counter fields
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* and, also for serializing the qed PTP API invocations.
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*/
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spinlock_t lock;
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bool hw_ts_ioctl_called;
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u16 tx_type;
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u16 rx_filter;
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};
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/**
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* qede_ptp_adjfreq
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* @ptp: the ptp clock structure
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* @ppb: parts per billion adjustment from base
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*
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* Adjust the frequency of the ptp cycle counter by the
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* indicated ppb from the base frequency.
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*/
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static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb)
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{
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struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info);
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struct qede_dev *edev = ptp->edev;
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int rc;
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__qede_lock(edev);
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if (edev->state == QEDE_STATE_OPEN) {
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spin_lock_bh(&ptp->lock);
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rc = ptp->ops->adjfreq(edev->cdev, ppb);
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spin_unlock_bh(&ptp->lock);
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} else {
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DP_ERR(edev, "PTP adjfreq called while interface is down\n");
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rc = -EFAULT;
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}
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__qede_unlock(edev);
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return rc;
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}
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static int qede_ptp_adjtime(struct ptp_clock_info *info, s64 delta)
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{
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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ptp = container_of(info, struct qede_ptp, clock_info);
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edev = ptp->edev;
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP adjtime called, delta = %llx\n",
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delta);
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spin_lock_bh(&ptp->lock);
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timecounter_adjtime(&ptp->tc, delta);
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spin_unlock_bh(&ptp->lock);
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return 0;
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}
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static int qede_ptp_gettime(struct ptp_clock_info *info, struct timespec64 *ts)
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{
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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u64 ns;
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ptp = container_of(info, struct qede_ptp, clock_info);
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edev = ptp->edev;
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spin_lock_bh(&ptp->lock);
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ns = timecounter_read(&ptp->tc);
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spin_unlock_bh(&ptp->lock);
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP gettime called, ns = %llu\n", ns);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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static int qede_ptp_settime(struct ptp_clock_info *info,
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const struct timespec64 *ts)
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{
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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u64 ns;
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ptp = container_of(info, struct qede_ptp, clock_info);
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edev = ptp->edev;
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ns = timespec64_to_ns(ts);
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP settime called, ns = %llu\n", ns);
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/* Re-init the timecounter */
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spin_lock_bh(&ptp->lock);
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timecounter_init(&ptp->tc, &ptp->cc, ns);
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spin_unlock_bh(&ptp->lock);
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return 0;
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}
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/* Enable (or disable) ancillary features of the phc subsystem */
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static int qede_ptp_ancillary_feature_enable(struct ptp_clock_info *info,
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struct ptp_clock_request *rq,
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int on)
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{
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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ptp = container_of(info, struct qede_ptp, clock_info);
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edev = ptp->edev;
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DP_ERR(edev, "PHC ancillary features are not supported\n");
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return -ENOTSUPP;
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}
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static void qede_ptp_task(struct work_struct *work)
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{
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struct skb_shared_hwtstamps shhwtstamps;
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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u64 timestamp, ns;
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int rc;
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ptp = container_of(work, struct qede_ptp, work);
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edev = ptp->edev;
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/* Read Tx timestamp registers */
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spin_lock_bh(&ptp->lock);
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rc = ptp->ops->read_tx_ts(edev->cdev, ×tamp);
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spin_unlock_bh(&ptp->lock);
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if (rc) {
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/* Reschedule to keep checking for a valid timestamp value */
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schedule_work(&ptp->work);
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return;
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}
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ns = timecounter_cyc2time(&ptp->tc, timestamp);
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memset(&shhwtstamps, 0, sizeof(shhwtstamps));
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shhwtstamps.hwtstamp = ns_to_ktime(ns);
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skb_tstamp_tx(ptp->tx_skb, &shhwtstamps);
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dev_kfree_skb_any(ptp->tx_skb);
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ptp->tx_skb = NULL;
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
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DP_VERBOSE(edev, QED_MSG_DEBUG,
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"Tx timestamp, timestamp cycles = %llu, ns = %llu\n",
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timestamp, ns);
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}
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/* Read the PHC. This API is invoked with ptp_lock held. */
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static u64 qede_ptp_read_cc(const struct cyclecounter *cc)
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{
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struct qede_dev *edev;
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struct qede_ptp *ptp;
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u64 phc_cycles;
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int rc;
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ptp = container_of(cc, struct qede_ptp, cc);
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edev = ptp->edev;
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rc = ptp->ops->read_cc(edev->cdev, &phc_cycles);
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if (rc)
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WARN_ONCE(1, "PHC read err %d\n", rc);
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles);
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return phc_cycles;
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}
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static int qede_ptp_cfg_filters(struct qede_dev *edev)
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{
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enum qed_ptp_hwtstamp_tx_type tx_type = QED_PTP_HWTSTAMP_TX_ON;
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enum qed_ptp_filter_type rx_filter = QED_PTP_FILTER_NONE;
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struct qede_ptp *ptp = edev->ptp;
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if (!ptp)
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return -EIO;
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if (!ptp->hw_ts_ioctl_called) {
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DP_INFO(edev, "TS IOCTL not called\n");
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return 0;
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}
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switch (ptp->tx_type) {
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case HWTSTAMP_TX_ON:
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edev->flags |= QEDE_TX_TIMESTAMPING_EN;
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tx_type = QED_PTP_HWTSTAMP_TX_ON;
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break;
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case HWTSTAMP_TX_OFF:
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edev->flags &= ~QEDE_TX_TIMESTAMPING_EN;
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tx_type = QED_PTP_HWTSTAMP_TX_OFF;
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break;
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case HWTSTAMP_TX_ONESTEP_SYNC:
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DP_ERR(edev, "One-step timestamping is not supported\n");
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return -ERANGE;
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}
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spin_lock_bh(&ptp->lock);
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switch (ptp->rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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rx_filter = QED_PTP_FILTER_NONE;
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break;
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case HWTSTAMP_FILTER_ALL:
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case HWTSTAMP_FILTER_SOME:
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case HWTSTAMP_FILTER_NTP_ALL:
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ptp->rx_filter = HWTSTAMP_FILTER_NONE;
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rx_filter = QED_PTP_FILTER_ALL;
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break;
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case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
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rx_filter = QED_PTP_FILTER_V1_L4_EVENT;
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break;
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case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
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/* Initialize PTP detection for UDP/IPv4 events */
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rx_filter = QED_PTP_FILTER_V1_L4_GEN;
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break;
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case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
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rx_filter = QED_PTP_FILTER_V2_L4_EVENT;
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break;
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case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
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/* Initialize PTP detection for UDP/IPv4 or UDP/IPv6 events */
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rx_filter = QED_PTP_FILTER_V2_L4_GEN;
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break;
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
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rx_filter = QED_PTP_FILTER_V2_L2_EVENT;
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break;
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
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/* Initialize PTP detection L2 events */
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rx_filter = QED_PTP_FILTER_V2_L2_GEN;
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break;
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case HWTSTAMP_FILTER_PTP_V2_EVENT:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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rx_filter = QED_PTP_FILTER_V2_EVENT;
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break;
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case HWTSTAMP_FILTER_PTP_V2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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/* Initialize PTP detection L2, UDP/IPv4 or UDP/IPv6 events */
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rx_filter = QED_PTP_FILTER_V2_GEN;
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break;
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}
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ptp->ops->cfg_filters(edev->cdev, rx_filter, tx_type);
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spin_unlock_bh(&ptp->lock);
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return 0;
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}
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int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *ifr)
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{
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struct hwtstamp_config config;
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struct qede_ptp *ptp;
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int rc;
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ptp = edev->ptp;
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if (!ptp)
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return -EIO;
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if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
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return -EFAULT;
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DP_VERBOSE(edev, QED_MSG_DEBUG,
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"HWTSTAMP IOCTL: Requested tx_type = %d, requested rx_filters = %d\n",
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config.tx_type, config.rx_filter);
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if (config.flags) {
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DP_ERR(edev, "config.flags is reserved for future use\n");
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return -EINVAL;
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}
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ptp->hw_ts_ioctl_called = 1;
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ptp->tx_type = config.tx_type;
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ptp->rx_filter = config.rx_filter;
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rc = qede_ptp_cfg_filters(edev);
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if (rc)
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return rc;
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config.rx_filter = ptp->rx_filter;
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return copy_to_user(ifr->ifr_data, &config,
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sizeof(config)) ? -EFAULT : 0;
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}
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int qede_ptp_get_ts_info(struct qede_dev *edev, struct ethtool_ts_info *info)
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{
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struct qede_ptp *ptp = edev->ptp;
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if (!ptp) {
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info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
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SOF_TIMESTAMPING_RX_SOFTWARE |
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SOF_TIMESTAMPING_SOFTWARE;
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info->phc_index = -1;
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return 0;
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}
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info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
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SOF_TIMESTAMPING_RX_SOFTWARE |
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SOF_TIMESTAMPING_SOFTWARE |
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|
|
SOF_TIMESTAMPING_TX_HARDWARE |
|
||
|
|
SOF_TIMESTAMPING_RX_HARDWARE |
|
||
|
|
SOF_TIMESTAMPING_RAW_HARDWARE;
|
||
|
|
|
||
|
|
if (ptp->clock)
|
||
|
|
info->phc_index = ptp_clock_index(ptp->clock);
|
||
|
|
else
|
||
|
|
info->phc_index = -1;
|
||
|
|
|
||
|
|
info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
|
||
|
|
BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
|
||
|
|
|
||
|
|
info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void qede_ptp_disable(struct qede_dev *edev)
|
||
|
|
{
|
||
|
|
struct qede_ptp *ptp;
|
||
|
|
|
||
|
|
ptp = edev->ptp;
|
||
|
|
if (!ptp)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (ptp->clock) {
|
||
|
|
ptp_clock_unregister(ptp->clock);
|
||
|
|
ptp->clock = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Cancel PTP work queue. Should be done after the Tx queues are
|
||
|
|
* drained to prevent additional scheduling.
|
||
|
|
*/
|
||
|
|
cancel_work_sync(&ptp->work);
|
||
|
|
if (ptp->tx_skb) {
|
||
|
|
dev_kfree_skb_any(ptp->tx_skb);
|
||
|
|
ptp->tx_skb = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Disable PTP in HW */
|
||
|
|
spin_lock_bh(&ptp->lock);
|
||
|
|
ptp->ops->disable(edev->cdev);
|
||
|
|
spin_unlock_bh(&ptp->lock);
|
||
|
|
|
||
|
|
kfree(ptp);
|
||
|
|
edev->ptp = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int qede_ptp_init(struct qede_dev *edev, bool init_tc)
|
||
|
|
{
|
||
|
|
struct qede_ptp *ptp;
|
||
|
|
int rc;
|
||
|
|
|
||
|
|
ptp = edev->ptp;
|
||
|
|
if (!ptp)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
spin_lock_init(&ptp->lock);
|
||
|
|
|
||
|
|
/* Configure PTP in HW */
|
||
|
|
rc = ptp->ops->enable(edev->cdev);
|
||
|
|
if (rc) {
|
||
|
|
DP_INFO(edev, "PTP HW enable failed\n");
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Init work queue for Tx timestamping */
|
||
|
|
INIT_WORK(&ptp->work, qede_ptp_task);
|
||
|
|
|
||
|
|
/* Init cyclecounter and timecounter. This is done only in the first
|
||
|
|
* load. If done in every load, PTP application will fail when doing
|
||
|
|
* unload / load (e.g. MTU change) while it is running.
|
||
|
|
*/
|
||
|
|
if (init_tc) {
|
||
|
|
memset(&ptp->cc, 0, sizeof(ptp->cc));
|
||
|
|
ptp->cc.read = qede_ptp_read_cc;
|
||
|
|
ptp->cc.mask = CYCLECOUNTER_MASK(64);
|
||
|
|
ptp->cc.shift = 0;
|
||
|
|
ptp->cc.mult = 1;
|
||
|
|
|
||
|
|
timecounter_init(&ptp->tc, &ptp->cc,
|
||
|
|
ktime_to_ns(ktime_get_real()));
|
||
|
|
}
|
||
|
|
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
int qede_ptp_enable(struct qede_dev *edev, bool init_tc)
|
||
|
|
{
|
||
|
|
struct qede_ptp *ptp;
|
||
|
|
int rc;
|
||
|
|
|
||
|
|
ptp = kzalloc(sizeof(*ptp), GFP_KERNEL);
|
||
|
|
if (!ptp) {
|
||
|
|
DP_INFO(edev, "Failed to allocate struct for PTP\n");
|
||
|
|
return -ENOMEM;
|
||
|
|
}
|
||
|
|
|
||
|
|
ptp->edev = edev;
|
||
|
|
ptp->ops = edev->ops->ptp;
|
||
|
|
if (!ptp->ops) {
|
||
|
|
DP_INFO(edev, "PTP enable failed\n");
|
||
|
|
rc = -EIO;
|
||
|
|
goto err1;
|
||
|
|
}
|
||
|
|
|
||
|
|
edev->ptp = ptp;
|
||
|
|
|
||
|
|
rc = qede_ptp_init(edev, init_tc);
|
||
|
|
if (rc)
|
||
|
|
goto err1;
|
||
|
|
|
||
|
|
qede_ptp_cfg_filters(edev);
|
||
|
|
|
||
|
|
/* Fill the ptp_clock_info struct and register PTP clock */
|
||
|
|
ptp->clock_info.owner = THIS_MODULE;
|
||
|
|
snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name);
|
||
|
|
ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB;
|
||
|
|
ptp->clock_info.n_alarm = 0;
|
||
|
|
ptp->clock_info.n_ext_ts = 0;
|
||
|
|
ptp->clock_info.n_per_out = 0;
|
||
|
|
ptp->clock_info.pps = 0;
|
||
|
|
ptp->clock_info.adjfreq = qede_ptp_adjfreq;
|
||
|
|
ptp->clock_info.adjtime = qede_ptp_adjtime;
|
||
|
|
ptp->clock_info.gettime64 = qede_ptp_gettime;
|
||
|
|
ptp->clock_info.settime64 = qede_ptp_settime;
|
||
|
|
ptp->clock_info.enable = qede_ptp_ancillary_feature_enable;
|
||
|
|
|
||
|
|
ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev);
|
||
|
|
if (IS_ERR(ptp->clock)) {
|
||
|
|
DP_ERR(edev, "PTP clock registration failed\n");
|
||
|
|
qede_ptp_disable(edev);
|
||
|
|
rc = -EINVAL;
|
||
|
|
goto err2;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
err1:
|
||
|
|
kfree(ptp);
|
||
|
|
err2:
|
||
|
|
edev->ptp = NULL;
|
||
|
|
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
void qede_ptp_tx_ts(struct qede_dev *edev, struct sk_buff *skb)
|
||
|
|
{
|
||
|
|
struct qede_ptp *ptp;
|
||
|
|
|
||
|
|
ptp = edev->ptp;
|
||
|
|
if (!ptp)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (test_and_set_bit_lock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags))
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (unlikely(!(edev->flags & QEDE_TX_TIMESTAMPING_EN))) {
|
||
|
|
DP_NOTICE(edev,
|
||
|
|
"Tx timestamping was not enabled, this packet will not be timestamped\n");
|
||
|
|
} else if (unlikely(ptp->tx_skb)) {
|
||
|
|
DP_NOTICE(edev,
|
||
|
|
"The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
|
||
|
|
} else {
|
||
|
|
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
|
||
|
|
/* schedule check for Tx timestamp */
|
||
|
|
ptp->tx_skb = skb_get(skb);
|
||
|
|
schedule_work(&ptp->work);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void qede_ptp_rx_ts(struct qede_dev *edev, struct sk_buff *skb)
|
||
|
|
{
|
||
|
|
struct qede_ptp *ptp;
|
||
|
|
u64 timestamp, ns;
|
||
|
|
int rc;
|
||
|
|
|
||
|
|
ptp = edev->ptp;
|
||
|
|
if (!ptp)
|
||
|
|
return;
|
||
|
|
|
||
|
|
spin_lock_bh(&ptp->lock);
|
||
|
|
rc = ptp->ops->read_rx_ts(edev->cdev, ×tamp);
|
||
|
|
if (rc) {
|
||
|
|
spin_unlock_bh(&ptp->lock);
|
||
|
|
DP_INFO(edev, "Invalid Rx timestamp\n");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
ns = timecounter_cyc2time(&ptp->tc, timestamp);
|
||
|
|
spin_unlock_bh(&ptp->lock);
|
||
|
|
skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
|
||
|
|
DP_VERBOSE(edev, QED_MSG_DEBUG,
|
||
|
|
"Rx timestamp, timestamp cycles = %llu, ns = %llu\n",
|
||
|
|
timestamp, ns);
|
||
|
|
}
|