543 lines
14 KiB
C
543 lines
14 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Joey Pan <joey.pan@mediatek.com>
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*/
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#ifndef __HDMI_DRV_H__
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#define __HDMI_DRV_H__
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#ifndef CONFIG_MTK_INTERNAL_HDMI_SUPPORT
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#include "lcm_drv.h"
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#endif
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#ifdef HDMI_MT8193_SUPPORT
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#include "mt8193hdmictrl.h"
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#include "mt8193edid.h"
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#include "mt8193cec.h"
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#endif
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#define AVD_TMR_ISR_TICKS 10
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#define MDI_BOUCING_TIMING 50 /* 20 //20ms */
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#ifdef CONFIG_MTK_INTERNAL_HDMI_SUPPORT
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#include "hdmicec.h"
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#endif
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enum HDMI_TASK_COMMAND_TYPE_T {
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HDMI_CEC_CMD = 0,
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HDMI_PLUG_DETECT_CMD,
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HDMI_HDCP_PROTOCAL_CMD,
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HDMI_DISABLE_HDMI_TASK_CMD,
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MAX_HDMI_TMR_NUMBER
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};
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#ifndef ARY_SIZE
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#define ARY_SIZE(x) (sizeof((x)) / sizeof((x[0])))
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#endif
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enum HDMI_POLARITY {
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HDMI_POLARITY_RISING = 0,
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HDMI_POLARITY_FALLING = 1
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};
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enum HDMI_CLOCK_PHASE {
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HDMI_CLOCK_PHASE_0 = 0,
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HDMI_CLOCK_PHASE_90 = 1
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};
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enum HDMI_COLOR_ORDER {
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HDMI_COLOR_ORDER_RGB = 0,
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HDMI_COLOR_ORDER_BGR = 1
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};
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enum IO_DRIVING_CURRENT {
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IO_DRIVING_CURRENT_8MA = (1 << 0),
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IO_DRIVING_CURRENT_4MA = (1 << 1),
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IO_DRIVING_CURRENT_2MA = (1 << 2),
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IO_DRIVING_CURRENT_SLEW_CNTL = (1 << 3),
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};
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struct HDMI_EDID_INFO_T {
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/* use EDID_VIDEO_RES_T, there are many resolution */
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unsigned int ui4_ntsc_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_pal_resolution;
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unsigned int ui4_sink_native_ntsc_resolution;
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unsigned int ui4_sink_native_pal_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_cea_ntsc_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_cea_pal_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_dtd_ntsc_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_dtd_pal_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_1st_dtd_ntsc_resolution;
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/* use EDID_VIDEO_RES_T */
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unsigned int ui4_sink_1st_dtd_pal_resolution;
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/* use EDID_VIDEO_COLORIMETRY_T */
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unsigned short ui2_sink_colorimetry;
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/* color bit for RGB */
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unsigned char ui1_sink_rgb_color_bit;
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/* color bit for YCbCr */
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unsigned char ui1_sink_ycbcr_color_bit;
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/* use EDID_AUDIO_DECODER_T */
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unsigned short ui2_sink_aud_dec;
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/* 1: Plug in 0:Plug Out */
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unsigned char ui1_sink_is_plug_in;
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/* use EDID_A_FMT_CH_TYPE */
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unsigned int ui4_hdmi_pcm_ch_type;
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/* use EDID_A_FMT_CH_TYPE1 */
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unsigned int ui4_hdmi_pcm_ch3ch4ch5ch7_type;
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/* use EDID_A_FMT_CH_TYPE */
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unsigned int ui4_dac_pcm_ch_type;
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unsigned char ui1_sink_i_latency_present;
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unsigned char ui1_sink_p_audio_latency;
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unsigned char ui1_sink_p_video_latency;
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unsigned char ui1_sink_i_audio_latency;
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unsigned char ui1_sink_i_video_latency;
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unsigned char ui1ExtEdid_Revision;
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unsigned char ui1Edid_Version;
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unsigned char ui1Edid_Revision;
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unsigned char ui1_Display_Horizontal_Size;
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unsigned char ui1_Display_Vertical_Size;
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unsigned int ui4_ID_Serial_Number;
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unsigned int ui4_sink_cea_3D_resolution;
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/* 0: not support AI, 1:support AI */
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unsigned char ui1_sink_support_ai;
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unsigned short ui2_sink_cec_address;
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unsigned short ui1_sink_max_tmds_clock;
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unsigned short ui2_sink_3D_structure;
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unsigned int ui4_sink_cea_FP_SUP_3D_resolution;
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unsigned int ui4_sink_cea_TOB_SUP_3D_resolution;
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unsigned int ui4_sink_cea_SBS_SUP_3D_resolution;
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/* (08H~09H) */
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unsigned short ui2_sink_ID_manufacturer_name;
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/* (0aH~0bH) */
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unsigned short ui2_sink_ID_product_code;
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/* (0cH~0fH) */
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unsigned int ui4_sink_ID_serial_number;
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/* (10H) */
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unsigned char ui1_sink_week_of_manufacture;
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/* (11H) base on year 1990 */
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unsigned char ui1_sink_year_of_manufacture;
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};
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#ifdef CONFIG_MTK_INTERNAL_HDMI_SUPPORT
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enum HDMI_VIDEO_RESOLUTION {
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HDMI_VIDEO_720x480p_60Hz = 0, /* 0 */
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HDMI_VIDEO_720x576p_50Hz, /* 1 */
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HDMI_VIDEO_1280x720p_60Hz, /* 2 */
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HDMI_VIDEO_1280x720p_50Hz, /* 3 */
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HDMI_VIDEO_1920x1080i_60Hz, /* 4 */
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HDMI_VIDEO_1920x1080i_50Hz, /* 5 */
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HDMI_VIDEO_1920x1080p_30Hz, /* 6 */
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HDMI_VIDEO_1920x1080p_25Hz, /* 7 */
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HDMI_VIDEO_1920x1080p_24Hz, /* 8 */
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HDMI_VIDEO_1920x1080p_23Hz, /* 9 */
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HDMI_VIDEO_1920x1080p_29Hz, /* a */
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HDMI_VIDEO_1920x1080p_60Hz, /* b */
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HDMI_VIDEO_1920x1080p_50Hz, /* c */
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HDMI_VIDEO_1280x720p3d_60Hz, /* d */
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HDMI_VIDEO_1280x720p3d_50Hz, /* e */
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HDMI_VIDEO_1920x1080i3d_60Hz, /* f */
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HDMI_VIDEO_1920x1080i3d_50Hz, /* 10 */
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HDMI_VIDEO_1920x1080p3d_24Hz, /* 11 */
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HDMI_VIDEO_1920x1080p3d_23Hz, /* 12 */
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/*the 2160 mean 3840x2160 */
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HDMI_VIDEO_2160P_23_976HZ, /* 13 */
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HDMI_VIDEO_2160P_24HZ, /* 14 */
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HDMI_VIDEO_2160P_25HZ, /* 15 */
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HDMI_VIDEO_2160P_29_97HZ, /* 16 */
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HDMI_VIDEO_2160P_30HZ, /* 17 */
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/*the 2161 mean 4096x2160 */
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HDMI_VIDEO_2161P_24HZ, /* 18 */
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HDMI_VIDEO_2160p_DSC_30Hz,
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HDMI_VIDEO_2160p_DSC_24Hz,
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HDMI_VIDEO_RESOLUTION_NUM
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};
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#else
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#if !defined(HDMI_MT8193_SUPPORT)
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enum HDMI_VIDEO_RESOLUTION {
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HDMI_VIDEO_720x480p_60Hz = 0,
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HDMI_VIDEO_1440x480i_60Hz = 1,
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HDMI_VIDEO_1280x720p_60Hz = 2,
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HDMI_VIDEO_1920x1080i_60Hz = 5,
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HDMI_VIDEO_1920x1080p_30Hz = 6,
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HDMI_VIDEO_720x480i_60Hz = 0xD,
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HDMI_VIDEO_1920x1080p_60Hz = 0x0b,
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HDMI_VIDEO_2160p_DSC_30Hz = 0x13,
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HDMI_VIDEO_2160p_DSC_24Hz = 0x14,
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HDMI_VIDEO_RESOLUTION_NUM
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};
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#endif
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#endif
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enum TEST_CASE_TYPE {
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Test_RGB888 = 0, Test_YUV422 = 1, Test_YUV444 = 2, Test_Reserved = 3
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};
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enum HDMI_VIDEO_INPUT_FORMAT {
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HDMI_VIN_FORMAT_RGB565,
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HDMI_VIN_FORMAT_RGB666,
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HDMI_VIN_FORMAT_RGB888,
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};
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enum HDMI_VIDEO_OUTPUT_FORMAT {
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HDMI_VOUT_FORMAT_RGB888,
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HDMI_VOUT_FORMAT_YUV422,
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HDMI_VOUT_FORMAT_YUV444,
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HDMI_VOUT_FORMAT_2D = 1 << 16,
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HDMI_VOUT_FORMAT_3D_SBS = 1 << 17,
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HDMI_VOUT_FORMAT_3D_TAB = 1 << 18,
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};
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/* Must align to MHL Tx chip driver define */
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enum HDMI_AUDIO_FORMAT {
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HDMI_AUDIO_32K_2CH = 0x01,
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HDMI_AUDIO_44K_2CH = 0x02,
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HDMI_AUDIO_48K_2CH = 0x03,
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HDMI_AUDIO_96K_2CH = 0x05,
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HDMI_AUDIO_192K_2CH = 0x07,
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HDMI_AUDIO_32K_8CH = 0x81,
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HDMI_AUDIO_44K_8CH = 0x82,
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HDMI_AUDIO_48K_8CH = 0x83,
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HDMI_AUDIO_96K_8CH = 0x85,
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HDMI_AUDIO_192K_8CH = 0x87,
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HDMI_AUDIO_INITIAL = 0xFF
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};
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enum HDMI_AUDIO_PCM_FORMAT {
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HDMI_AUDIO_PCM_16bit_48000,
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HDMI_AUDIO_PCM_16bit_44100,
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HDMI_AUDIO_PCM_16bit_32000,
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HDMI_AUDIO_SOURCE_STREAM,
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};
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struct HDMI_CONFIG {
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enum HDMI_VIDEO_RESOLUTION vformat;
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enum HDMI_VIDEO_INPUT_FORMAT vin;
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enum HDMI_VIDEO_OUTPUT_FORMAT vout;
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enum HDMI_AUDIO_FORMAT aformat;
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};
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enum HDMI_OUTPUT_MODE {
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HDMI_OUTPUT_MODE_LCD_MIRROR,
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HDMI_OUTPUT_MODE_VIDEO_MODE,
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HDMI_OUTPUT_MODE_DPI_BYPASS
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};
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enum HDMI_CABLE_TYPE {
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HDMI_CABLE,
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MHL_CABLE,
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MHL_SMB_CABLE,
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MHL_2_CABLE, /* /MHL 2.0 */
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MHL_3D_GLASSES,
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SLIMPORT_CABLE
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};
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enum HDMI_3D_FORMAT_ENUM {
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HDMI_2D,
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HDMI_3D_SBS,
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HDMI_3D_TAB,
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HDMI_3D_FP
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};
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struct HDMI_PARAMS {
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unsigned int width;
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unsigned int height;
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struct HDMI_CONFIG init_config;
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/* polarity parameters */
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enum HDMI_POLARITY clk_pol;
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enum HDMI_POLARITY de_pol;
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enum HDMI_POLARITY vsync_pol;
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enum HDMI_POLARITY hsync_pol;
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/* timing parameters */
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unsigned int hsync_pulse_width;
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unsigned int hsync_back_porch;
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unsigned int hsync_front_porch;
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unsigned int vsync_pulse_width;
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unsigned int vsync_back_porch;
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unsigned int vsync_front_porch;
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/* output format parameters */
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enum HDMI_COLOR_ORDER rgb_order;
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/* intermediate buffers parameters */
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unsigned int intermediat_buffer_num; /* 2..3 */
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/* iopad parameters */
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enum IO_DRIVING_CURRENT io_driving_current;
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enum HDMI_OUTPUT_MODE output_mode;
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int is_force_awake;
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int is_force_landscape;
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/* determine the scaling of output screen size, valid value 0~10 */
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unsigned int scaling_factor;
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/* 0 means no scaling, 5 means scaling to 95%, 10 means 90% */
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bool NeedSwHDCP;
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enum HDMI_CABLE_TYPE cabletype;
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unsigned int HDCPSupported;
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int is_3d_support;
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unsigned int input_clock;
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#ifndef CONFIG_MTK_INTERNAL_HDMI_SUPPORT
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struct LCM_DSI_PARAMS dsi_params;
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#endif
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};
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enum HDMI_STATE {
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HDMI_STATE_NO_DEVICE,
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HDMI_STATE_ACTIVE,
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HDMI_STATE_CONNECTING,
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HDMI_STATE_PLUGIN_ONLY,
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HDMI_STATE_EDID_UPDATE,
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HDMI_STATE_CEC_UPDATE,
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HDMI_STATE_NO_DEVICE_IN_BOOT,
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HDMI_STATE_ACTIVE_IN_BOOT,
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};
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enum HDMI_CEC_STATE {
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HDMI_CEC_STATE_PLUG_OUT = 0,
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HDMI_CEC_STATE_GET_PA,
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HDMI_CEC_STATE_TX_STS,
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HDMI_CEC_STATE_GET_CMD
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};
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enum HDMI_DEEP_COLOR_T {
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HDMI_DEEP_COLOR_AUTO = 0,
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HDMI_NO_DEEP_COLOR,
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HDMI_DEEP_COLOR_10_BIT,
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HDMI_DEEP_COLOR_12_BIT,
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HDMI_DEEP_COLOR_16_BIT
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};
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enum HDMI_OUT_COLOR_SPACE_T {
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HDMI_RGB = 0,
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HDMI_RGB_FULL,
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HDMI_YCBCR_444,
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HDMI_YCBCR_422,
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HDMI_XV_YCC,
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HDMI_YCBCR_444_FULL,
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HDMI_YCBCR_422_FULL
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};
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enum HDMI_AUDIO_SAMPLING_T {
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HDMI_FS_32K = 0,
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HDMI_FS_44K,
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HDMI_FS_48K,
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HDMI_FS_88K,
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HDMI_FS_96K,
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HDMI_FS_176K,
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HDMI_FS_192K
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};
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struct HDMI_AUDIO_DEC_OUTPUT_CHANNEL_T {
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unsigned short FL:1; /* bit0 */
|
||
|
|
unsigned short FR:1; /* bit1 */
|
||
|
|
unsigned short LFE:1; /* bit2 */
|
||
|
|
unsigned short FC:1; /* bit3 */
|
||
|
|
unsigned short RL:1; /* bit4 */
|
||
|
|
unsigned short RR:1; /* bit5 */
|
||
|
|
unsigned short RC:1; /* bit6 */
|
||
|
|
unsigned short FLC:1; /* bit7 */
|
||
|
|
unsigned short FRC:1; /* bit8 */
|
||
|
|
unsigned short RRC:1; /* bit9 */
|
||
|
|
unsigned short RLC:1; /* bit10 */
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
enum HDMI_AUDIO_INPUT_TYPE_T {
|
||
|
|
SV_I2S = 0,
|
||
|
|
SV_SPDIF
|
||
|
|
};
|
||
|
|
|
||
|
|
enum HDMI_AUDIO_I2S_FMT_T {
|
||
|
|
HDMI_RJT_24BIT = 0,
|
||
|
|
HDMI_RJT_16BIT,
|
||
|
|
HDMI_LJT_24BIT,
|
||
|
|
HDMI_LJT_16BIT,
|
||
|
|
HDMI_I2S_24BIT,
|
||
|
|
HDMI_I2S_16BIT
|
||
|
|
};
|
||
|
|
|
||
|
|
enum SAMPLE_FREQUENCY_T {
|
||
|
|
MCLK_128FS,
|
||
|
|
MCLK_192FS,
|
||
|
|
MCLK_256FS,
|
||
|
|
MCLK_384FS,
|
||
|
|
MCLK_512FS,
|
||
|
|
MCLK_768FS,
|
||
|
|
MCLK_1152FS,
|
||
|
|
};
|
||
|
|
|
||
|
|
enum IEC_FRAME_RATE_T {
|
||
|
|
IEC_48K = 0,
|
||
|
|
IEC_96K,
|
||
|
|
IEC_192K,
|
||
|
|
IEC_768K,
|
||
|
|
IEC_44K,
|
||
|
|
IEC_88K,
|
||
|
|
IEC_176K,
|
||
|
|
IEC_705K,
|
||
|
|
IEC_16K,
|
||
|
|
IEC_22K,
|
||
|
|
IEC_24K,
|
||
|
|
IEC_32K,
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
union AUDIO_DEC_OUTPUT_CHANNEL_UNION_T {
|
||
|
|
/* HDMI_AUDIO_DEC_OUTPUT_CHANNEL_T */
|
||
|
|
struct HDMI_AUDIO_DEC_OUTPUT_CHANNEL_T bit;
|
||
|
|
unsigned short word;
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
struct HDMI_AV_INFO_T {
|
||
|
|
enum HDMI_VIDEO_RESOLUTION e_resolution;
|
||
|
|
unsigned char fgHdmiOutEnable;
|
||
|
|
unsigned char u2VerFreq;
|
||
|
|
unsigned char b_hotplug_state;
|
||
|
|
enum HDMI_OUT_COLOR_SPACE_T e_video_color_space;
|
||
|
|
enum HDMI_DEEP_COLOR_T e_deep_color_bit;
|
||
|
|
unsigned char ui1_aud_out_ch_number;
|
||
|
|
enum HDMI_AUDIO_SAMPLING_T e_hdmi_fs;
|
||
|
|
unsigned char bhdmiRChstatus[6];
|
||
|
|
unsigned char bhdmiLChstatus[6];
|
||
|
|
unsigned char bMuteHdmiAudio;
|
||
|
|
unsigned char u1HdmiI2sMclk;
|
||
|
|
unsigned char u1hdcponoff;
|
||
|
|
unsigned char u1audiosoft;
|
||
|
|
unsigned char fgHdmiTmdsEnable;
|
||
|
|
union AUDIO_DEC_OUTPUT_CHANNEL_UNION_T ui2_aud_out_ch;
|
||
|
|
|
||
|
|
unsigned char e_hdmi_aud_in;
|
||
|
|
unsigned char e_iec_frame;
|
||
|
|
unsigned char e_aud_code;
|
||
|
|
unsigned char u1Aud_Input_Chan_Cnt;
|
||
|
|
unsigned char e_I2sFmt;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
/* ---------------------------------------------------- */
|
||
|
|
|
||
|
|
struct HDMI_UTIL_FUNCS {
|
||
|
|
void (*set_reset_pin)(unsigned int value);
|
||
|
|
int (*set_gpio_out)(unsigned int gpio, unsigned int value);
|
||
|
|
void (*udelay)(unsigned int us);
|
||
|
|
void (*mdelay)(unsigned int ms);
|
||
|
|
void (*wait_transfer_done)(void);
|
||
|
|
void (*state_callback)(enum HDMI_STATE state);
|
||
|
|
void (*cec_state_callback)(enum HDMI_CEC_STATE state);
|
||
|
|
};
|
||
|
|
|
||
|
|
#define SINK_480P (1 << 0)
|
||
|
|
#define SINK_720P60 (1 << 1)
|
||
|
|
#define SINK_1080I60 (1 << 2)
|
||
|
|
#define SINK_1080P60 (1 << 3)
|
||
|
|
#define SINK_480P_1440 (1 << 4)
|
||
|
|
#define SINK_480P_2880 (1 << 5)
|
||
|
|
#define SINK_480I (1 << 6)
|
||
|
|
#define SINK_480I_1440 (1 << 7)
|
||
|
|
#define SINK_480I_2880 (1 << 8)
|
||
|
|
#define SINK_1080P30 (1 << 9)
|
||
|
|
#define SINK_576P (1 << 10)
|
||
|
|
#define SINK_720P50 (1 << 11)
|
||
|
|
#define SINK_1080I50 (1 << 12)
|
||
|
|
#define SINK_1080P50 (1 << 13)
|
||
|
|
#define SINK_576P_1440 (1 << 14)
|
||
|
|
#define SINK_576P_2880 (1 << 15)
|
||
|
|
#define SINK_576I (1 << 16)
|
||
|
|
#define SINK_576I_1440 (1 << 17)
|
||
|
|
#define SINK_576I_2880 (1 << 18)
|
||
|
|
#define SINK_1080P25 (1 << 19)
|
||
|
|
#define SINK_1080P24 (1 << 20)
|
||
|
|
#define SINK_1080P23976 (1 << 21)
|
||
|
|
#define SINK_1080P2997 (1 << 22)
|
||
|
|
#define SINK_2160p30 (1 << 23)
|
||
|
|
#define SINK_2160p24 (1 << 24)
|
||
|
|
|
||
|
|
typedef void (*CABLE_INSERT_CALLBACK) (enum HDMI_STATE state);
|
||
|
|
|
||
|
|
struct HDMI_DRIVER {
|
||
|
|
void (*set_util_funcs)(const struct HDMI_UTIL_FUNCS *util);
|
||
|
|
void (*get_params)(struct HDMI_PARAMS *params);
|
||
|
|
int (*init)(void);
|
||
|
|
int (*enter)(void);
|
||
|
|
int (*exit)(void);
|
||
|
|
void (*suspend)(void);
|
||
|
|
void (*resume)(void);
|
||
|
|
int (*video_config)(enum HDMI_VIDEO_RESOLUTION vformat,
|
||
|
|
enum HDMI_VIDEO_INPUT_FORMAT vin, int vou);
|
||
|
|
int (*audio_config)(enum HDMI_AUDIO_FORMAT aformat, int bitWidth);
|
||
|
|
int (*video_enable)(bool enable);
|
||
|
|
int (*audio_enable)(bool enable);
|
||
|
|
int (*irq_enable)(bool enable);
|
||
|
|
int (*power_on)(void);
|
||
|
|
void (*power_off)(void);
|
||
|
|
enum HDMI_STATE (*get_state)(void);
|
||
|
|
void (*set_mode)(unsigned char ucMode);
|
||
|
|
void (*dump)(void);
|
||
|
|
int (*get_external_device_capablity)(void);
|
||
|
|
void (*force_on)(int from_uart_drv);
|
||
|
|
void (*register_callback)(CABLE_INSERT_CALLBACK cb);
|
||
|
|
void (*unregister_callback)(CABLE_INSERT_CALLBACK cb);
|
||
|
|
#if !defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
|
||
|
|
void (*read)(unsigned char u8Reg);
|
||
|
|
void (*write)(unsigned char u8Reg, unsigned char u8Data);
|
||
|
|
void (*log_enable)(bool enable);
|
||
|
|
void (*getedid)(void *pv_get_info);
|
||
|
|
#else
|
||
|
|
void (*read)(unsigned long u2Reg, unsigned int *p4Data);
|
||
|
|
void (*write)(unsigned long u2Reg, unsigned int u4Data);
|
||
|
|
void (*log_enable)(u16 enable);
|
||
|
|
void (*InfoframeSetting)(u8 i1typemode, u8 i1typeselect);
|
||
|
|
void (*checkedid)(u8 i1noedid);
|
||
|
|
void (*colordeep)(u8 u1colorspace, u8 u1deepcolor);
|
||
|
|
void (*enablehdcp)(u8 u1hdcponoff);
|
||
|
|
void (*setcecrxmode)(u8 u1cecrxmode);
|
||
|
|
void (*hdmistatus)(void);
|
||
|
|
void (*hdcpkey)(u8 *pbhdcpkey);
|
||
|
|
void (*getedid)(struct _HDMI_EDID_T *pv_get_info);
|
||
|
|
void (*setcecla)(struct CEC_DRV_ADDR_CFG_T *prAddr);
|
||
|
|
void (*sendsltdata)(u8 *pu1Data);
|
||
|
|
void (*getceccmd)(struct CEC_FRAME_DESCRIPTION_IO *frame);
|
||
|
|
void (*getsltdata)(struct CEC_SLT_DATA *rCecSltData);
|
||
|
|
void (*setceccmd)(struct CEC_SEND_MSG_T *msg);
|
||
|
|
void (*cecenable)(u8 u1EnCec);
|
||
|
|
void (*getcecaddr_)(struct CEC_ADDRESS_IO *cecaddr);
|
||
|
|
u8 (*checkedidheader)(void);
|
||
|
|
int (*audiosetting)(struct HDMITX_AUDIO_PARA *audio_para);
|
||
|
|
int (*tmdsonoff)(unsigned char u1ionoff);
|
||
|
|
void (*mutehdmi)(unsigned char u1flagvideomute,
|
||
|
|
unsigned char u1flagaudiomute);
|
||
|
|
void (*svpmutehdmi)(unsigned char u1svpvideomute,
|
||
|
|
unsigned char u1svpaudiomute);
|
||
|
|
void (*cecusrcmd)(unsigned int cmd, unsigned int *result);
|
||
|
|
void (*getcectxstatus)(struct CEC_ACK_INFO_T *pt);
|
||
|
|
u32 (*gethdmistatus)(void);
|
||
|
|
void (*resolution_setting)(int res);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
};
|
||
|
|
/* --------------------------------------------- */
|
||
|
|
/* HDMI Driver Functions */
|
||
|
|
/* --------------------------------------------- */
|
||
|
|
extern unsigned int dst_is_dsi;
|
||
|
|
extern struct semaphore hdmi_update_mutex;
|
||
|
|
const struct HDMI_DRIVER *HDMI_GetDriver(void);
|
||
|
|
void Notify_AP_MHL_TX_Event(unsigned int event, unsigned int event_param,
|
||
|
|
void *param);
|
||
|
|
extern int chip_device_id;
|
||
|
|
extern bool need_reset_usb_switch;
|
||
|
|
#endif /* __HDMI_DRV_H__ */
|