473 lines
12 KiB
ArmAsm
473 lines
12 KiB
ArmAsm
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/csr.h>
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#include <asm/unistd.h>
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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.text
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.altmacro
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/*
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* Prepares to enter a system call or exception by saving all registers to the
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* stack.
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*/
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.macro SAVE_ALL
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LOCAL _restore_kernel_tpsp
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LOCAL _save_context
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/*
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* If coming from userspace, preserve the user thread pointer and load
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* the kernel thread pointer. If we came from the kernel, sscratch
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* will contain 0, and we should continue on the current TP.
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*/
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csrrw tp, sscratch, tp
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bnez tp, _save_context
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_restore_kernel_tpsp:
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csrr tp, sscratch
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REG_S sp, TASK_TI_KERNEL_SP(tp)
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_save_context:
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REG_S sp, TASK_TI_USER_SP(tp)
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REG_L sp, TASK_TI_KERNEL_SP(tp)
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addi sp, sp, -(PT_SIZE_ON_STACK)
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REG_S x1, PT_RA(sp)
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REG_S x3, PT_GP(sp)
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REG_S x5, PT_T0(sp)
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REG_S x6, PT_T1(sp)
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REG_S x7, PT_T2(sp)
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REG_S x8, PT_S0(sp)
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REG_S x9, PT_S1(sp)
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REG_S x10, PT_A0(sp)
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REG_S x11, PT_A1(sp)
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REG_S x12, PT_A2(sp)
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REG_S x13, PT_A3(sp)
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REG_S x14, PT_A4(sp)
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REG_S x15, PT_A5(sp)
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REG_S x16, PT_A6(sp)
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REG_S x17, PT_A7(sp)
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REG_S x18, PT_S2(sp)
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REG_S x19, PT_S3(sp)
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REG_S x20, PT_S4(sp)
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REG_S x21, PT_S5(sp)
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REG_S x22, PT_S6(sp)
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REG_S x23, PT_S7(sp)
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REG_S x24, PT_S8(sp)
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REG_S x25, PT_S9(sp)
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REG_S x26, PT_S10(sp)
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REG_S x27, PT_S11(sp)
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REG_S x28, PT_T3(sp)
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REG_S x29, PT_T4(sp)
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REG_S x30, PT_T5(sp)
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REG_S x31, PT_T6(sp)
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/*
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* Disable user-mode memory access as it should only be set in the
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* actual user copy routines.
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*
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* Disable the FPU to detect illegal usage of floating point in kernel
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* space.
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*/
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li t0, SR_SUM | SR_FS
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REG_L s0, TASK_TI_USER_SP(tp)
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csrrc s1, sstatus, t0
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csrr s2, sepc
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csrr s3, sbadaddr
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csrr s4, scause
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csrr s5, sscratch
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REG_S s0, PT_SP(sp)
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REG_S s1, PT_SSTATUS(sp)
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REG_S s2, PT_SEPC(sp)
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REG_S s3, PT_SBADADDR(sp)
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REG_S s4, PT_SCAUSE(sp)
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REG_S s5, PT_TP(sp)
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.endm
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/*
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* Prepares to return from a system call or exception by restoring all
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* registers from the stack.
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*/
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.macro RESTORE_ALL
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REG_L a0, PT_SSTATUS(sp)
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REG_L a2, PT_SEPC(sp)
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csrw sstatus, a0
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csrw sepc, a2
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REG_L x1, PT_RA(sp)
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REG_L x3, PT_GP(sp)
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REG_L x4, PT_TP(sp)
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REG_L x5, PT_T0(sp)
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REG_L x6, PT_T1(sp)
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REG_L x7, PT_T2(sp)
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REG_L x8, PT_S0(sp)
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REG_L x9, PT_S1(sp)
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REG_L x10, PT_A0(sp)
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REG_L x11, PT_A1(sp)
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REG_L x12, PT_A2(sp)
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REG_L x13, PT_A3(sp)
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REG_L x14, PT_A4(sp)
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REG_L x15, PT_A5(sp)
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REG_L x16, PT_A6(sp)
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REG_L x17, PT_A7(sp)
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REG_L x18, PT_S2(sp)
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REG_L x19, PT_S3(sp)
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REG_L x20, PT_S4(sp)
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REG_L x21, PT_S5(sp)
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REG_L x22, PT_S6(sp)
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REG_L x23, PT_S7(sp)
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REG_L x24, PT_S8(sp)
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REG_L x25, PT_S9(sp)
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REG_L x26, PT_S10(sp)
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REG_L x27, PT_S11(sp)
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REG_L x28, PT_T3(sp)
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REG_L x29, PT_T4(sp)
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REG_L x30, PT_T5(sp)
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REG_L x31, PT_T6(sp)
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REG_L x2, PT_SP(sp)
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.endm
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ENTRY(handle_exception)
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SAVE_ALL
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/*
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* Set sscratch register to 0, so that if a recursive exception
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* occurs, the exception vector knows it came from the kernel
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*/
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csrw sscratch, x0
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/* Load the global pointer */
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.option push
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.option norelax
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la gp, __global_pointer$
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.option pop
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la ra, ret_from_exception
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/*
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* MSB of cause differentiates between
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* interrupts and exceptions
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*/
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bge s4, zero, 1f
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/* Handle interrupts */
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move a0, sp /* pt_regs */
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move a1, s4 /* scause */
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tail do_IRQ
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1:
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/* Exceptions run with interrupts enabled or disabled
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depending on the state of sstatus.SR_SPIE */
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andi t0, s1, SR_SPIE
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beqz t0, 1f
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csrs sstatus, SR_SIE
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1:
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/* Handle syscalls */
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li t0, EXC_SYSCALL
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beq s4, t0, handle_syscall
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/* Handle other exceptions */
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slli t0, s4, RISCV_LGPTR
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la t1, excp_vect_table
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la t2, excp_vect_table_end
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move a0, sp /* pt_regs */
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add t0, t1, t0
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/* Check if exception code lies within bounds */
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bgeu t0, t2, 1f
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REG_L t0, 0(t0)
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jr t0
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1:
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tail do_trap_unknown
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handle_syscall:
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/* save the initial A0 value (needed in signal handlers) */
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REG_S a0, PT_ORIG_A0(sp)
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/*
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* Advance SEPC to avoid executing the original
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* scall instruction on sret
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*/
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addi s2, s2, 0x4
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REG_S s2, PT_SEPC(sp)
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/* Trace syscalls, but only if requested by the user. */
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REG_L t0, TASK_TI_FLAGS(tp)
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andi t0, t0, _TIF_SYSCALL_TRACE
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bnez t0, handle_syscall_trace_enter
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check_syscall_nr:
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/* Check to make sure we don't jump to a bogus syscall number. */
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li t0, __NR_syscalls
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la s0, sys_ni_syscall
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/* Syscall number held in a7 */
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bgeu a7, t0, 1f
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la s0, sys_call_table
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slli t0, a7, RISCV_LGPTR
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add s0, s0, t0
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REG_L s0, 0(s0)
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1:
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jalr s0
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ret_from_syscall:
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/* Set user a0 to kernel a0 */
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REG_S a0, PT_A0(sp)
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/* Trace syscalls, but only if requested by the user. */
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REG_L t0, TASK_TI_FLAGS(tp)
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andi t0, t0, _TIF_SYSCALL_TRACE
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bnez t0, handle_syscall_trace_exit
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ret_from_exception:
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REG_L s0, PT_SSTATUS(sp)
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csrc sstatus, SR_SIE
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andi s0, s0, SR_SPP
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bnez s0, restore_all
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resume_userspace:
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/* Interrupts must be disabled here so flags are checked atomically */
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REG_L s0, TASK_TI_FLAGS(tp) /* current_thread_info->flags */
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andi s1, s0, _TIF_WORK_MASK
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bnez s1, work_pending
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/* Save unwound kernel stack pointer in thread_info */
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addi s0, sp, PT_SIZE_ON_STACK
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REG_S s0, TASK_TI_KERNEL_SP(tp)
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/*
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* Save TP into sscratch, so we can find the kernel data structures
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* again.
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*/
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csrw sscratch, tp
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restore_all:
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RESTORE_ALL
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sret
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work_pending:
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/* Enter slow path for supplementary processing */
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la ra, ret_from_exception
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andi s1, s0, _TIF_NEED_RESCHED
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bnez s1, work_resched
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work_notifysig:
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/* Handle pending signals and notify-resume requests */
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csrs sstatus, SR_SIE /* Enable interrupts for do_notify_resume() */
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move a0, sp /* pt_regs */
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move a1, s0 /* current_thread_info->flags */
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tail do_notify_resume
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work_resched:
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tail schedule
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/* Slow paths for ptrace. */
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handle_syscall_trace_enter:
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move a0, sp
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call do_syscall_trace_enter
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REG_L a0, PT_A0(sp)
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REG_L a1, PT_A1(sp)
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REG_L a2, PT_A2(sp)
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REG_L a3, PT_A3(sp)
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REG_L a4, PT_A4(sp)
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REG_L a5, PT_A5(sp)
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REG_L a6, PT_A6(sp)
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REG_L a7, PT_A7(sp)
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j check_syscall_nr
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handle_syscall_trace_exit:
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move a0, sp
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call do_syscall_trace_exit
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j ret_from_exception
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END(handle_exception)
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ENTRY(ret_from_fork)
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la ra, ret_from_exception
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tail schedule_tail
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ENDPROC(ret_from_fork)
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ENTRY(ret_from_kernel_thread)
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call schedule_tail
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/* Call fn(arg) */
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la ra, ret_from_exception
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move a0, s1
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jr s0
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ENDPROC(ret_from_kernel_thread)
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/*
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* Integer register context switch
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* The callee-saved registers must be saved and restored.
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*
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* a0: previous task_struct (must be preserved across the switch)
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* a1: next task_struct
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*
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* The value of a0 and a1 must be preserved by this function, as that's how
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* arguments are passed to schedule_tail.
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*/
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ENTRY(__switch_to)
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/* Save context into prev->thread */
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li a4, TASK_THREAD_RA
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add a3, a0, a4
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add a4, a1, a4
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REG_S ra, TASK_THREAD_RA_RA(a3)
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REG_S sp, TASK_THREAD_SP_RA(a3)
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REG_S s0, TASK_THREAD_S0_RA(a3)
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REG_S s1, TASK_THREAD_S1_RA(a3)
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REG_S s2, TASK_THREAD_S2_RA(a3)
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REG_S s3, TASK_THREAD_S3_RA(a3)
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REG_S s4, TASK_THREAD_S4_RA(a3)
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REG_S s5, TASK_THREAD_S5_RA(a3)
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REG_S s6, TASK_THREAD_S6_RA(a3)
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REG_S s7, TASK_THREAD_S7_RA(a3)
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REG_S s8, TASK_THREAD_S8_RA(a3)
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REG_S s9, TASK_THREAD_S9_RA(a3)
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REG_S s10, TASK_THREAD_S10_RA(a3)
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REG_S s11, TASK_THREAD_S11_RA(a3)
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/* Restore context from next->thread */
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REG_L ra, TASK_THREAD_RA_RA(a4)
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REG_L sp, TASK_THREAD_SP_RA(a4)
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REG_L s0, TASK_THREAD_S0_RA(a4)
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REG_L s1, TASK_THREAD_S1_RA(a4)
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REG_L s2, TASK_THREAD_S2_RA(a4)
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REG_L s3, TASK_THREAD_S3_RA(a4)
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REG_L s4, TASK_THREAD_S4_RA(a4)
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REG_L s5, TASK_THREAD_S5_RA(a4)
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REG_L s6, TASK_THREAD_S6_RA(a4)
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REG_L s7, TASK_THREAD_S7_RA(a4)
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REG_L s8, TASK_THREAD_S8_RA(a4)
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REG_L s9, TASK_THREAD_S9_RA(a4)
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REG_L s10, TASK_THREAD_S10_RA(a4)
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REG_L s11, TASK_THREAD_S11_RA(a4)
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/* Swap the CPU entry around. */
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lw a3, TASK_TI_CPU(a0)
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|
lw a4, TASK_TI_CPU(a1)
|
||
|
|
sw a3, TASK_TI_CPU(a1)
|
||
|
|
sw a4, TASK_TI_CPU(a0)
|
||
|
|
#if TASK_TI != 0
|
||
|
|
#error "TASK_TI != 0: tp will contain a 'struct thread_info', not a 'struct task_struct' so get_current() won't work."
|
||
|
|
addi tp, a1, TASK_TI
|
||
|
|
#else
|
||
|
|
move tp, a1
|
||
|
|
#endif
|
||
|
|
ret
|
||
|
|
ENDPROC(__switch_to)
|
||
|
|
|
||
|
|
ENTRY(__fstate_save)
|
||
|
|
li a2, TASK_THREAD_F0
|
||
|
|
add a0, a0, a2
|
||
|
|
li t1, SR_FS
|
||
|
|
csrs sstatus, t1
|
||
|
|
frcsr t0
|
||
|
|
fsd f0, TASK_THREAD_F0_F0(a0)
|
||
|
|
fsd f1, TASK_THREAD_F1_F0(a0)
|
||
|
|
fsd f2, TASK_THREAD_F2_F0(a0)
|
||
|
|
fsd f3, TASK_THREAD_F3_F0(a0)
|
||
|
|
fsd f4, TASK_THREAD_F4_F0(a0)
|
||
|
|
fsd f5, TASK_THREAD_F5_F0(a0)
|
||
|
|
fsd f6, TASK_THREAD_F6_F0(a0)
|
||
|
|
fsd f7, TASK_THREAD_F7_F0(a0)
|
||
|
|
fsd f8, TASK_THREAD_F8_F0(a0)
|
||
|
|
fsd f9, TASK_THREAD_F9_F0(a0)
|
||
|
|
fsd f10, TASK_THREAD_F10_F0(a0)
|
||
|
|
fsd f11, TASK_THREAD_F11_F0(a0)
|
||
|
|
fsd f12, TASK_THREAD_F12_F0(a0)
|
||
|
|
fsd f13, TASK_THREAD_F13_F0(a0)
|
||
|
|
fsd f14, TASK_THREAD_F14_F0(a0)
|
||
|
|
fsd f15, TASK_THREAD_F15_F0(a0)
|
||
|
|
fsd f16, TASK_THREAD_F16_F0(a0)
|
||
|
|
fsd f17, TASK_THREAD_F17_F0(a0)
|
||
|
|
fsd f18, TASK_THREAD_F18_F0(a0)
|
||
|
|
fsd f19, TASK_THREAD_F19_F0(a0)
|
||
|
|
fsd f20, TASK_THREAD_F20_F0(a0)
|
||
|
|
fsd f21, TASK_THREAD_F21_F0(a0)
|
||
|
|
fsd f22, TASK_THREAD_F22_F0(a0)
|
||
|
|
fsd f23, TASK_THREAD_F23_F0(a0)
|
||
|
|
fsd f24, TASK_THREAD_F24_F0(a0)
|
||
|
|
fsd f25, TASK_THREAD_F25_F0(a0)
|
||
|
|
fsd f26, TASK_THREAD_F26_F0(a0)
|
||
|
|
fsd f27, TASK_THREAD_F27_F0(a0)
|
||
|
|
fsd f28, TASK_THREAD_F28_F0(a0)
|
||
|
|
fsd f29, TASK_THREAD_F29_F0(a0)
|
||
|
|
fsd f30, TASK_THREAD_F30_F0(a0)
|
||
|
|
fsd f31, TASK_THREAD_F31_F0(a0)
|
||
|
|
sw t0, TASK_THREAD_FCSR_F0(a0)
|
||
|
|
csrc sstatus, t1
|
||
|
|
ret
|
||
|
|
ENDPROC(__fstate_save)
|
||
|
|
|
||
|
|
ENTRY(__fstate_restore)
|
||
|
|
li a2, TASK_THREAD_F0
|
||
|
|
add a0, a0, a2
|
||
|
|
li t1, SR_FS
|
||
|
|
lw t0, TASK_THREAD_FCSR_F0(a0)
|
||
|
|
csrs sstatus, t1
|
||
|
|
fld f0, TASK_THREAD_F0_F0(a0)
|
||
|
|
fld f1, TASK_THREAD_F1_F0(a0)
|
||
|
|
fld f2, TASK_THREAD_F2_F0(a0)
|
||
|
|
fld f3, TASK_THREAD_F3_F0(a0)
|
||
|
|
fld f4, TASK_THREAD_F4_F0(a0)
|
||
|
|
fld f5, TASK_THREAD_F5_F0(a0)
|
||
|
|
fld f6, TASK_THREAD_F6_F0(a0)
|
||
|
|
fld f7, TASK_THREAD_F7_F0(a0)
|
||
|
|
fld f8, TASK_THREAD_F8_F0(a0)
|
||
|
|
fld f9, TASK_THREAD_F9_F0(a0)
|
||
|
|
fld f10, TASK_THREAD_F10_F0(a0)
|
||
|
|
fld f11, TASK_THREAD_F11_F0(a0)
|
||
|
|
fld f12, TASK_THREAD_F12_F0(a0)
|
||
|
|
fld f13, TASK_THREAD_F13_F0(a0)
|
||
|
|
fld f14, TASK_THREAD_F14_F0(a0)
|
||
|
|
fld f15, TASK_THREAD_F15_F0(a0)
|
||
|
|
fld f16, TASK_THREAD_F16_F0(a0)
|
||
|
|
fld f17, TASK_THREAD_F17_F0(a0)
|
||
|
|
fld f18, TASK_THREAD_F18_F0(a0)
|
||
|
|
fld f19, TASK_THREAD_F19_F0(a0)
|
||
|
|
fld f20, TASK_THREAD_F20_F0(a0)
|
||
|
|
fld f21, TASK_THREAD_F21_F0(a0)
|
||
|
|
fld f22, TASK_THREAD_F22_F0(a0)
|
||
|
|
fld f23, TASK_THREAD_F23_F0(a0)
|
||
|
|
fld f24, TASK_THREAD_F24_F0(a0)
|
||
|
|
fld f25, TASK_THREAD_F25_F0(a0)
|
||
|
|
fld f26, TASK_THREAD_F26_F0(a0)
|
||
|
|
fld f27, TASK_THREAD_F27_F0(a0)
|
||
|
|
fld f28, TASK_THREAD_F28_F0(a0)
|
||
|
|
fld f29, TASK_THREAD_F29_F0(a0)
|
||
|
|
fld f30, TASK_THREAD_F30_F0(a0)
|
||
|
|
fld f31, TASK_THREAD_F31_F0(a0)
|
||
|
|
fscsr t0
|
||
|
|
csrc sstatus, t1
|
||
|
|
ret
|
||
|
|
ENDPROC(__fstate_restore)
|
||
|
|
|
||
|
|
|
||
|
|
.section ".rodata"
|
||
|
|
.align LGREG
|
||
|
|
/* Exception vector table */
|
||
|
|
ENTRY(excp_vect_table)
|
||
|
|
RISCV_PTR do_trap_insn_misaligned
|
||
|
|
RISCV_PTR do_trap_insn_fault
|
||
|
|
RISCV_PTR do_trap_insn_illegal
|
||
|
|
RISCV_PTR do_trap_break
|
||
|
|
RISCV_PTR do_trap_load_misaligned
|
||
|
|
RISCV_PTR do_trap_load_fault
|
||
|
|
RISCV_PTR do_trap_store_misaligned
|
||
|
|
RISCV_PTR do_trap_store_fault
|
||
|
|
RISCV_PTR do_trap_ecall_u /* system call, gets intercepted */
|
||
|
|
RISCV_PTR do_trap_ecall_s
|
||
|
|
RISCV_PTR do_trap_unknown
|
||
|
|
RISCV_PTR do_trap_ecall_m
|
||
|
|
RISCV_PTR do_page_fault /* instruction page fault */
|
||
|
|
RISCV_PTR do_page_fault /* load page fault */
|
||
|
|
RISCV_PTR do_trap_unknown
|
||
|
|
RISCV_PTR do_page_fault /* store page fault */
|
||
|
|
excp_vect_table_end:
|
||
|
|
END(excp_vect_table)
|